I2S questions & review?

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I2S questions & review?

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Contributor II
Hi, I'm trying to interconnect a MAXIM codec together with the K40 mcu. I'm a bit in doubt about the connections and was hoping you could help me out in my first steps with the K40 The codec has shared BCLK and LRCLK for the RX and TX line but on the K40 they are seperated interfaces - how do i make that work?? The codec wants 12.288MHz clock input to achieve maximum performance but if I attach a 12.288MHz to the crystal port on the K40 in order for it's I2S pheripheral to output that as a MCLK it seems that I cannot use the USB pheripheral as that requires a 4MHz clock ?? Thanks !
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NXP Employee
NXP Employee

Earl has a good point. Using the Kinetis to generate the mater clocks will add a lot of jitter on your audio and this impacts the audio quality.

If you're targeting an USB application with audio, a 2 oscillator approach will be the best. One for the MCU input to generate USB clock based on PLL (8 or 4 Mhz work pretty well) and the 12.288Mhz for the MCLK on the I2S.

The SAI module on Kinetis is capable to use just one BCLK and one LRCLK to feed Tx and RX. This is called synchronous mode.

You can take a look to the TWR-AUDIO-SGTL on for an example on how to connect the clocks. Here is the link to the schematics:

http://tinyurl.com/9hg7vra

In this case, the codec is the master, providing MCLK, BCLK and LRCLK. Here you'll find a sample code running on a TWR-K60D100M that might help you:

https://community.freescale.com/thread/81904

You also can feed MCLK to Kinetis and use the internal dividers to generate the I2S clocks, in this case, Kinetis will be the master and you avoid the excessive jitter becuase a dedicated oscillator is used as reference.



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NXP Employee
NXP Employee

Earl has a good point. Using the Kinetis to generate the mater clocks will add a lot of jitter on your audio and this impacts the audio quality.

If you're targeting an USB application with audio, a 2 oscillator approach will be the best. One for the MCU input to generate USB clock based on PLL (8 or 4 Mhz work pretty well) and the 12.288Mhz for the MCLK on the I2S.

The SAI module on Kinetis is capable to use just one BCLK and one LRCLK to feed Tx and RX. This is called synchronous mode.

You can take a look to the TWR-AUDIO-SGTL on for an example on how to connect the clocks. Here is the link to the schematics:

http://tinyurl.com/9hg7vra

In this case, the codec is the master, providing MCLK, BCLK and LRCLK. Here you'll find a sample code running on a TWR-K60D100M that might help you:

https://community.freescale.com/thread/81904

You also can feed MCLK to Kinetis and use the internal dividers to generate the I2S clocks, in this case, Kinetis will be the master and you avoid the excessive jitter becuase a dedicated oscillator is used as reference.



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Contributor II

Hello Carlos,

As I was searching in the community to find a solution for my problem, I saw that you're probably familiar with codec.

actually I'm using wolfson WM8731 Audio CODEC and I want to connect it to K22F through I2C.

I initialized I2C by processor expert and I want to send data to CODEC. I'm first sending the address register but there's no acknowledge from CODEC. as I checked, the address must be 0x34 for this CODEC. Can you help me with this issue?

Regards,

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Senior Contributor III

The 'reasonable' way to have CoDecs run at their 'odd' rates is to let the Kinetis I2S interface operate fully as a slave, and make the CoDec generate the frame & bit clocks.  While the Kinetis 'claims' to be able to divide-down an MCLK, it does so by 'dropping' CPU clocks as necessary, meaning MASSIVE jitter, so I don't recommend going that way--get a pure MCLK somewhere else.  To get the data to/from memory, you might DMA  -- see https://community.freescale.com/message/82190#82190  It is a setup to stream multiple audio channels thru individual ping/pong buffers.

 

USB requires a 48MHz clock, and you can get that either from the dedicated USB clock pin, OR run the CPU at either 48 or 96MHz.

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