I2C0 Baudrate on S9KEAZ128AMLK not as expected according to Datasheet

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I2C0 Baudrate on S9KEAZ128AMLK not as expected according to Datasheet

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Herb
Contributor I

Hello,

 

i try to setup I2C0 on FRDM-KEAZ128 Board.

I tried to directly use the example code included in the QuickStartPackage named FRDM_KEA128_I2C_MasterInt.

Baudrate register is here configured to be 0xBC. According to the Datasheet, this means MUL=4 and ICR=60. Baudrate should be then 24MHz BusClock / (4*60) = 100kBaud.

I connected a logic analyzer to I2C0 Pins PTA2/PTA3 and i can see the Communication, but the Baudrate is just arround 2.5kHz!

I played arround and checked all possible registers, but have not found the problem.

Setting the Baudrate register to 0x10 will produce 400kBaud.

Can anybody tell me, what's wrong?

Thanks in Advance,

Herb

 

In the meanwhile i found out, that 0x1F gives me 100kBaud. Found a sample code, were the description is different. ICR=31 seems to be devide by 240.

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Herb
Contributor I

At least, i found out, what is wrong.

ICR Value is not the SCL Devider as expected while checking the (wrong) sample code.

Found chp 31.4.1.10 where the relationship is described.

Here it is stated, that an ICR of 0x1F equals a divider of 240.

 

Problem. solved.

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467件の閲覧回数
Herb
Contributor I

At least, i found out, what is wrong.

ICR Value is not the SCL Devider as expected while checking the (wrong) sample code.

Found chp 31.4.1.10 where the relationship is described.

Here it is stated, that an ICR of 0x1F equals a divider of 240.

 

Problem. solved.

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