Overview
This document describes how to use ezport module on TWR-K22F120M, and the usage of ezport on other platforms is similar.
The EzPort module is a serial flash programming interface that enables In-System Programming (ISP) of flash memory contents in a 32-bit general-purpose microcontroller.
The block diagram of EzPort module is as follows:

Hardware environments
- TWR-K60D100M
- TWR-K22F120M
- TWR-SER
- Primary and Secondary Tower boards
Because the EzPort module is a serial flash programming interface that is compatible with a subset of the SPI format. TWR-K60D100M is used as a SPI master and TWR-K22F120M is used as a slave. The flash memory contents of TWR-K22F120M can be read/erased/programmed from TWR-K60D100M.
Connect the TWR-K60D100M and TWR-SER by two tower boards, the execution result will be outputed by uart.
Step 1:TWR-K22F120M enters into EzPort mode
Hardware setup:
If the TWR-K22F120M wants to enter EzPort mode, the EZP_CS pin should be asserted and then reset pin is asserted.
TWR-K60D100M TWR-K22F120M
PTC6(J11 A71) EZP_CS(J31 Pin9)
Software setup:
- Open the project “ezport_test_kinetis”;
- Define the MACRO “ENTER_EZPORT_MODULE” in hal_config.h;
- Build and download the program into TWR-K60D100M, run it, then EZP_CS pin of TWR-K22F120M will be asserted.
- Then power-on the TWR-K22F120M. The TWR-K22F120M will enter into EzPort mode.
Step 2: Use EzPort to read/erase/program the flash
Hardware setup:
TWR-K60D100M TWR-K22F120M
PTD0(J11 B63) EZP_CS(J31 Pin9)
PTD1(J11 B64) EZP_CLK(J31 Pin4)
PTD2(J11 A76) EZP_DI(J31 Pin8)
PTD3(J11 A77) EZP_DO(J31 Pin6)
GND(J11 B65) GND(J31 Pin5)
Note: TWR-K60D100M and TWR-K22F120M should have common ground.
Software setup:
- Open the project “ezport_test_kinetis”;
- Undefine the MACRO “ENTER_EZPORT_MODULE” in hal_config.h, then EzPort test codes will be enabled;
- Build and download the program into TWR-K60D100M, run it, then the flash memory contents of TWR-K22F120M can be read/erased/programmed from TWR-K60D100M, the execution result will output to the console by uart.