How to decouple a KL27Z circuit?

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How to decouple a KL27Z circuit?

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kicad1978
Contributor II

Dear community. Let me ask straight, How do I properly decouple a Kinetis KL27Z? I use it as a controller for a simple PC-USB-Keyboard. I've read the datasheet and application notes, but I got stuck with certain questions. I'm using the inbuilt voltage regulator, and +5V comes from VBUS into VREGIN. Here my questions:
-- how many bypass capacitors (0.1µF) are needed, and at which pins?
-- how many bulk capacitors (2.2µF) are needed, and at which pins?
-- if (do I?) have to use a 2.2µf between VBUS and VREGIN, where do I have to place it, near the USB connector, or near the MCU?

The power pins that are candidates for decoupling are:
VREGIN (fed with +5V from USB)
VOUT33 (+3V3)
VDD1 (+3V3)
VDD2 (+3V3)
VDD3 (+3V3)
VDDA (+3V3)
VREFH (+3V3)

best regards, from a KiCAD user.

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5 Replies

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kicad1978
Contributor II

Here is my attempt, with the questions highlighted.

decouplingquestions.jpg

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kicad1978
Contributor II

Any comments?

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vicentegomez
NXP TechSupport
NXP TechSupport

Hi

you can check our recommendation on the Kinetis L Peripheral Module Quick Reference please check the chapter 2

also you can check the 

FRDM-KL27Z - Printed Circuit Board bill of materials and design files

For your reference, also you need to take care if your final product will be use in a electrical noise environment you probably will need add more protection for the EMC.

Regards

Vicente Gomez 

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rastislav_pavlanin
NXP Employee
NXP Employee

Hi kicad1978,

I would fully agree with Vicente refarding to EMC (take the inspiration from our designs TWR-KL43 etc).

Be very carefull with placing correct components on that part, especially on internal voltage regulator (see also Mark's Space: USB VBUS over voltage issue.). Our VREG is very sensitive on overvoltage stress, the max. VREGIN is 5.5V. Any short voltage pulses over that value (even 6V with dedicated energy) can lead to damage voltage regulator. Hence, it is striclty required to add TVS diodes, I would also prefer capacitor on VREGIN to be tantal or electrolytic (with high ESR which will damp oscilation, or serial ceramic capacitor + resistances etc.). The oscilation are deeply dependent on VREGIN capacitance and the length of USB cable. Shorter cable (lower inductance) can produce higher frequency oscilations which at the end can lead into higher voltage levels at very begining of USB cable plug-in. The higher ESR (or external serial R) can damp these oscilation down, However, high speed TVS can also significantly help to reduce/absorb these voltage peaks. Also some power switch placed between USB power and VREGIN can help isolate/delayed each other diring power on.

The final behaviour of the board will of course depends on many factors: PCB layout, component selection (R, C, TVS), quality of component assembling, working conditions, application behaviour (if there is a direct higher power consumption at the very begining) etc.

I guess that your questions came out from the view of reducing the total cost. I personaly do not like such approach because it comes out from assumption of "ideal world", no EMC, no parasitic componenst etc. However, I fully understand these trend :-) . 

These are some of my suggestion:

Q1:

- in some cases it can help.

Q2:

- yes, place it close to VOUT33

Q3:

- I would prefer to have it there. The value can slightly depends also on application requirements. Sometimes it is necessrary to detect power lost. In such case the low voltage detection can detect the event and make some special required actions e.g. store some data into the flash which at the end will require some energy to be stored in external capacity. But this is most probably not your case.

Q4:

- yes, I prefer tantalum, or electrolytic or serial ceramic with resistance (R = ~ESR of tantal resistance). Place it close to VREGIN pin (the inductance created by the PCB path from VREGIN to USB connector will be added to inductance of USB cable). Higher inductance L will dicrease the resonant oscilation frequency (L + C on VREGIN) which at some point can help to reduce voltage transients.

Q5:

- depends on your application. If your use ADC measurement and VREFH as reference for in your application then I prefer ti have it there. SAR ADC on Kinetis devices works as redistributive charging principle SAR, it means there are capacitor banks inside which need to be properly charged/discharged during aproximation steps of converison. These can require some special current peak during converison. These capacitance can help for that. Place it close to VREFH then.

NOTEs:

- I strictly recommend to add TVS diodes to USB power and data (make inspiration from our designs)

- add ferite beads to USB connector case and GND

- if ADC used and higher accurancy required then I recommend to isolate VDD and VDDA from higher frequency components (adding ferite beads)

- power switch on VREGIN can also significantly help, and in some cases it can be even cheaper solution.

regards

R.

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kicad1978
Contributor II

rasto, thanks for the comprehensive and very helpful answers. Yes, the TVS diode is  a nice feature I will add to my next PCB batch. About placement: so basically, I try to place every cap near the pins. If the value is smaller, like 0.1µF, I have to place them very close (1cm max), and if the value is abit higher, like 2.2µF, I can place them abit farther away (2-3cm max.).

I know it's hard to judge how noisy the environment will be, it depends on too many unknown factors.

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