How do I end a SPI Transfer when a particular byte is received?

[atm]

I am using the processor expert SPI_Master_LDD, but it is slightly modified to integrate with some more advanced driver code.

I am using this driver code to communicate with a part I have not communicated with before and I am having an issue.

The protocol for the device I am communicating with requires me to send a packet of data and then receive until I receive a non-zero response. I have no problem constructing a send and then receive, but I cannot figure out how to--when I detect a non-zero character--end the SPI message immediately (deassert chip select) without shifting out any extra frames.

My driver, up to this point, has always known the fixed amount of bytes it would need to receive and would clear the SPI_PUSHR_CS_MASK in the SPI_PUSHR register to clock in the last byte of received data.

Thanks for the help in advance!

[Hui_Ma]

Hi

Customer application is a special SPI application case. The Processor Expert SPIMaster_LDD just designed for general SPI application, which losing the flexibility.

Customer could refer to use KSDK software, which provide more SPI module related driver and HAL driver.

Customer can use those HAL driver to generate a suitable application driver.

Wish it helps.

Have a great day,
Ma Hui
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[atm]

Thank you for your reply, Hui.

The SPI driver I am using uses SPIMaster_LDD as a start, but I am not using code generation with processor expert in my project. So I have no trouble making any modification to the SPIMaster driver that I may need.

I am not sure I understand how the KSDK would solve the problem? I am not sure it is possible to address the issue I am having without software control of the chip select rather than allowing the SPI module to control the start of that digital output.

[Hui_Ma]

Hi

For your application need to check the SPI input data value, which need to add related code with SPI communication handler.

The KSDK driver code could provide some flexible usage, such as DSPI_StopTransfer() function to stop the SPI transfer.

/*!

* @brief Stops (halts) DSPI transfers and sets HALT bit in MCR.

*

* This function stops data transfers in either master or slave mode.

*

* @param base DSPI peripheral address.

*/

static inline void DSPI_StopTransfer(SPI_Type *base)

{

    base->MCR |= SPI_MCR_HALT_MASK;

}

Wish it helps.

Have a great day,
Ma Hui
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[atm]

Thank you for your help.

From what I can tell, just setting the halt bit will not cause the chip select line to be deasserted. The datasheet says:

The PUSHR[CONT] / DSICR0[DCONT] bits must be deasserted before asserting

MCR[HALT] bit in master mode. This will make sure that the PCSn signals are

deasserted. Asserting MCR[HALT] bit during continuous transfer will cause the

PCSn signals to remain asserted and hence Slave Device cannot transition from

Running to Stopped state.

Would I be able to clear PUSHR[CONT] bit and then set the MCR[HALT] bit? Or would that still shift out an extra frame. I may have to try this to see if it will work.

[Hui_Ma]

Hi

If customer had set this [CONT] bit at SPIx_PUSHR register before, customer can clear this [CONT] bit and then set MCR[HALT] to stop the SPI transmission.

Wish it helps.

Have a great day,
Ma Hui
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Note: If this post answers your question, please click the Correct Answer button. Thank you!
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