Having trouble getting UART0 working on FRDM-KL25z

[funkyguy4000]

Hello,

I've having difficulty getting my UART driver to work on the KL25Z
I followed this document from freescale: http://cache.freescale.com/files/32bit/doc/quick_ref_guide/KLQRUG.pdf
This doesn't seem to work.

My main method handles what would normally be in a "getchar" and "putchar" method.
I just want it to repeat what I send it.

My code is as follows:

This is the main.c file

#include "UART.h"

int main(void){
     uart0_Init();

     while(1){
          while(!(UART0->D1 & UART_S1_RDRF_MASK));
          c = UART0->D;
          while(!(UART0->S1 & UART_S1_TDRE_MASK) && !(UART0->S1_TC_MASK));
          UART0->D = c;
     }
}

And this is the UART.h file:

#include <MKL25Z4.h>
#include <stdio.h>
#include "delay.h"

#define POLLING_MODE 1
#define UART_MODE POLLING_MODE

void uart0_Init(void){
     SIM->SOPT2 |= SIM_SOPT2_UART0SRC(1);
     SIM->SOPT2 |= SIM_SOPT2_PLLFLLSEL_MASK;
     SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
     SIM->SCGC5 |= SIM_SCGC5_PORTA_MASK;

     PORTA->PCR[2] = PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x2);
     PORTA->PCR[1] = PORT_PCR_ISF_MASK | PORT_PCR_MUX(0x2);

     UART0->C2 &= ~(UART0_C2_TE_MASK | UART0_C2_RE_MASK);

     UART0->BDH = 0x00;
     UART0->PDL = 0x1A;
     UART0->c4 = 0x0F;

     UART0->C1 = 0x00;
     UART0->C3 = 0x00;
     UART0->MA1 = 0x00;
     UART0->MA2 = 0x00;
     UART0->S1 = 0x1F;
     UART0->S2 = 0xC0;

     UART0->C2 |= UART0_C2_TE_MASK | UART0_C2_RE_MASK;
}

[funkyguy4000]

I figured out the issues and I have uploaded my code up to Github.
The project was created using Keil uVision 4 so beware

ARM-Programs/Bare Metal/FRDM-KL25 UART0 at master · funkyguy4000/ARM-Programs · GitHub

[bryancole-b4682]

Hi Shannon,

Have you enabled the UART clock source in your application? The LQRUG_uart_ex1 selects the FLLCLK as the input clock source for Uart0.

SIM->SOPT2 |= SIM_SOPT2_UART0SRC(1);             --> selects the clock source for Uart0 to be either the FLLCLK or PLLCLK/2 depending on SIM_SOPT2[PLLFLLSEL] status

SIM->SOPT2 &= ~SIM_SOPT2_PLLFLLSEL_MASK;  --> selects FLLCLK (this bit is set in the KLQRUG snippet which I believe is a typo)

Have you configured the FLLCLK in your application? If so, what frequency?

The oversampling ratio and (OSR) and baud rate divisors (BDL and BDH) in the application are used to produce a baud rate of 115200 from the 48 MHz FLL clock frequency. If you are using a clock frequency other than 48 MHz, you will need to adjust the OSR and Baud divisors to meet your desired baud rate. Baud rate = module frequency / ((OSR +1)*baud

Is your terminal application configured for 115200?

Thanks,

Bryan

[hungpham]

I have the same problem with him, I try the example code, it's work fine, but when i try create myself project and copy all code from the UART_ex1 example project, it does not work!
Can you solve this problem?
Thanks for advance! :smileyhappy:

[mjbcswitzerland]

Hi

You can get UART code for KL and K parts (interrupt and DMA driven) from the uTasker project (supports up to 6 UARTs in parallel and operational on all Freescale demo and eval boards - incl. FRDM-KL25Z).

The UART interface is described in http://www.utasker.com/docs/uTasker/uTaskerUART.PDF

The uTasker Kinetis simulator will emulate the Kinetis UARTs by connecting them to the PC's COM ports (or virtual COM ports) so that the interrupt and DMA behaviour can be observed or analysed (and incorrect driver code be identified) and complete applications using UART communication be developed, tested and debugged.

Regards

Mark

http://www.utasker.com/kinetis.html

[jeremyzhou]

Hi Shannon,

Thank you very much for your focus on Freescale Kinetis product. I'm glad to provide service for you.

I'd like to suggest you refer to LQRUG_uart_ex1 and LQRUG_uart_ex2 in FRDM-KL25 sample code whose link as follow.

Hope my support help.

http://www.freescale.com/files/32bit/software/KL25_SC.exe

Have a great day,
Ping

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