Get a value outside interrupt uart (and related questions)

[Catosh]

Hello,

I am currently using UART5 PDD with PE on a k60 with tx interrupts enable.

According to datasheet, I have to read s1 reg and then data reg. Here come the "problems": If I access registers in the interrupt routine (in events.c), I am able to clear the interrupt and then going on with the main cycle: eg. below.

void UART5_ISR(void){
    UART_PDD_ReadStatus1Reg(UART5_BASE_PTR);
    tx_data=UART_PDD_ReadDataReg(UART5_BASE_PTR);
    uart_rx_flag=1;
}

BUT then if I try to print tx_data (global, volatile and uint8_t variable) into the main routine with

void main(){
[...]
while(1)UART_PDD_PutChar8(UART5_BASE_PTR,tx_data);

It doesn't update the value. So I have to perform another read operation into the main.

Furthermore, if I try to clear the interrupt OUTSIDE ISR (e.g into the main) e.g

void main(){
[...]
if(1==uart_rx_flag){
 UART_PDD_ReadStatus1Reg(UART5_BASE_PTR);
 tx_data=UART_PDD_ReadDataReg(UART5_BASE_PTR);
 uart_rx_flag=0;
}

I am NOT able to clear the interrupt asserted by the UART5.

I think is something related in preserving the shared registers on the stack, so something ARM related (and not Freescale related :smileygrin:).

But Any hint will be greatly appreciated, since currently I have NO idea on how workout this problem.

Best regards,

Luca.

[Catosh]

First of all,
thank you very much for your reply.

Actually, I already declared my variables as volatile in processorExpert.c and external volatile in events.c; anyway they still arent' updated. BTW, using pointers I am able to work around this problem.

Best regards,

L.

[ndavies]

It has nothing to do with the ARM core. It is a compiler optimization stopping the reloads of the variables. The compiler assumes the variables you are using are not modified by outside code such as Interrupt routines.

You need to declare the variables you are accessing in both the main loop and your interrupt function as volatile.

volatile char tx_data;

volatile char uart_tx_flag;

The compiler is optimizing out the loads of the variables from RAM into the cores registers. Your main loop loads the variables into a register once on startup and then never goes back to the original RAM location to reload the variables. The main loop never sees the data items change.

By making the variables volatile it will force the compiled main loop code to reload the variables from ram on every iteration of the loop.