Hi Dudley,
The default frequency of the BUSCLK is 24MHz, it need to be calculated by using the default values of below registers.
See the "Figure 5-1. Clocking diagram" in KEA128RM.pdf, and the default values.

The default value of IREFS bit in ICS_C1 is 1, this means Internal reference clock(37.5kHz) is selected for the FLL.
Then the FLL loop locks the frequency to 1280 times the internal reference frequency.(ICSFLLCLK=37.5kHz*1280=40MHz)
The default value of CLKS bit in ICS_C1 is 00, selects the clock source (output of FLL) that controls the bus frequency.




Best Regards,
Robin
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