Flexbus speed exceeded on TWR-K64F120M?

[GudeADS]

Hi,

we are using a TWR-K64F120M board and I try to understand the Flexbus settings for the TWR-Kit to make the adoptions for our custom board. When I look into the bsp standard code of the K64F120M for MRAM I find no code that set the SIM_CLKDIV1_OUTDIV3 register. Since there is no divider set, the Flexbus should be running at 120Mhz like the normal bus clock. But I read that the Flexbus speed should not exceed 50Mhz. Why is this working?

Best Regards

[larryc]

Andreas:

Are you clocking this board with an external 50Mhz source and setting up the mcg to distribute this clock yourself?

What devices are you using on the Flexbus?

Thanks

Larry

[GudeADS]

Hello Larry,

I thought that SIM_CLKDIV1_OUTDIV3 was not touched from MQX when initializing the TWR-K64F120M board. But I had not seen that this parameter is already set with CPU_SIM_CLKDIV1_CONFIG_0 inside the CPU_ClockConfigDescriptors. The bsp clock module is very complicated if you work the first time with a Kinetis device.

Best Regards

[larryc]

1 Clocking Diagram".  I find it helps to highlight the paths that are required, and then confirm with a debugger (I use segger) that all the registers are set the way you expect them.  The last step is just to get the clock routed via the SIM module to the side of the chip you need it on. 

Good luck, Larry

Larry