FlexCAN 800K Baud issue in KinetisK series

[maryellenmclaug]

Hi - I have a MK22FX512AVLL12 with an 8M Osc and 40M Bus Clock. I have successfully setup the FlexCAN to run at 125K, 250K, 500K and 1M baud rate. I cannot get the 800K baud rate to work.  Can you point me in a direction of a tool to setup the PhaseSeg1,PhaseSeg2 and PropSeg to get that to work?  For the other baud rates I use

/* Default protocol timing configuration, time quantum is 10. */
config->timingConfig.phaseSeg1 = 3;//PRESDIV == 11
config->timingConfig.phaseSeg2 = 2;//
config->timingConfig.propSeg = 1;
config->timingConfig.rJumpwidth = 1;

[Robin_Shen]

You can try to use the CAN Bit Time Calculation.

For example 800K baud rate:
    /* Init FlexCAN module. */
    flexcanConfig.baudRate = 800000U;
    flexcanConfig.timingConfig.phaseSeg1 = 7;
    flexcanConfig.timingConfig.phaseSeg2 = 7;
    flexcanConfig.timingConfig.propSeg = 7;
    flexcanConfig.timingConfig.rJumpwidth = 1;

Best Regards,

Robin

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[maryellenmclaug]

Mark - This works great. Thank you so much. Can you tell me how to calculate these values? I don't see that anywhere in the video you pointed me to.  Can you provide me with the calculations done to get the PropSeg, PhaseSeg1, PhaseSeg2 and the JumpWidth. I was using this document from Freescale that doesn't give results like yours. FlexCAN Bit Timing Calculation.  Please advise.

[mjbcswitzerland]

Mary

Simple old-fashioned code (no point-and-shoot GUI that may or may not work):
https://github.com/uTasker/uTasker-Kinetis/blob/master/Hardware/Kinetis/kinetis_CAN.h
Line 298: static unsigned long fnOptimalCAN_clock(unsigned short usMode, unsigned long ulSpeed)
BUS_CLOCK is 40000000
usMode passed is CAN_PLL_CLOCK
ulSpeed passed is 800000

Regards

Mark

[maryellenmclaug]

Hi Mark - Thank you for your help and your quick reply.  I am using the CAN engine clock source as the peripheral clock, which is setup to be 40 MHz.  So that would make CAN_CTRL1 = 0x008b2002 and that doesn't give me 800K. I don't know how to use the uTasker project.  Can you retry with my peripheral clock? Thanks for the help.  What is the uTasker project?

[mjbcswitzerland]

Hi Mary

If you are clocking from the 40MHz bus clock (note that generally the oscillator is recommended for less jitter) the values for 800kHz CAN bus operation are
- pre-scaler of 2
- phase buffer segment 2 length of 8
- time quanta of 25
which results in the register value of 0x01bf2007

uTasker CAN can be seen here:
https://www.youtube.com/watch?v=Ha8cv_XEvco&t=4s

The project allows applications to run on almost all Kinetis parts without needing to port between them (as well as various other processor families), with chip simulation to simplify and accelerate all aspects of development, test and debugging. It is available in free open source form [with all the basics like serial loaders, HW libraries, USB classes, TCP/IP stack and utFAT] and also in professionally supported form with addition integrated options such as security, FreeRTOS integration, Modbus and CANopen.

Training and development support is available for new Kinetis users and for problem solving in existing projects.

Regards

Mark

[mjbcswitzerland]

Hi

Could you try with the value

0x008b0002 in CAN_CTRL ?

When I run the uTasker project for your chip and oscillator at 800kHz CAN bus it gives me a pre-scaler of 1, phase buffer segment 2 length of 4, time quanta of 6, which result in this register value.

If it works you can get the calculation routine from the open source uTasker project (in kinetis_CAN.h), where the following explanation is also given for the calculation.

// The best choice of clock input is from the external crystal (lowest jitter), however this may not always enable the best settings to achieve the required speed.
// The choice of clock source is user-defined but this routine tries to achieve best settings using highest time quanta resolution. 
//
// There are up to 25 time quanta in a CAN bit time and the bit frequency is equal to the clock frequency divided by the quanta number (8..25 time quanta range)
// There is always a single time quanta at the start of a bit period called the SYNC_SEG which cannot be changed (transitions are expected to occur on the bus during this period)
// The sampling occurs after time segment 1, which is made up of a propagation segment (1..8 time quanta) plus a phase buffer segment 1 (1..8 time quanta),
// followed by time segment 2, made up of phase buffer segment 2 (2..8 time quanta)
//
// CAN standard compliant bit segment settings give the following ranges (re-synchronisation jump width of 2 is used since it is compliant with all)
// Time segment 1 should be 5..10 when time segment 2 is 2 (min/max time quanta per bit is 8/13)
// Time segment 1 should be 4..11 when time segment 2 is 3 (min/max time quanta per bit is 8/15)
// Time segment 1 should be 5..12 when time segment 2 is 4 (min/max time quanta per bit is 10/17)
// Time segment 1 should be 6..13 when time segment 2 is 5 (min/max time quanta per bit is 12/19)
// Time segment 1 should be 7..14 when time segment 2 is 6 (min/max time quanta per bit is 14/21)
// Time segment 1 should be 8..15 when time segment 2 is 7 (min/max time quanta per bit is 16/23)
// Time segment 1 should be 9..16 when time segment 2 is 8 (min/max time quanta per bit is 18/25)
//
static unsigned long fnOptimalCAN_clock(unsigned short usMode, unsigned long ulSpeed)
‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

Regards

Mark

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