Fast frequency meter, hints and limitations

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Fast frequency meter, hints and limitations

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Catosh
Contributor IV

Hello,

I have a couple of questions about frequency measurement in Kinetis MCUs (K22).

First of all, I would like to measure some fast signal (a clock) with a frequency of 1/10th of core clock( let's say 48MHz of core clock, 5 mhz max of input frequency). According to the datasheet, my max input frequency shall be core clock /4.
Is there a way to calculate what will my accuracy be? Ok, I suppose it will depend from the "architecture" I am going to use to perform measurements. And so, here comes the first "true" question.

What's the best approach to measure a fast signal like this one?

Three possibile approaches:

  1. Using FTM on CHn as input capture and store X values (let's say 64) of FTM_CnV. Then I will average the mean tick between the edges of the signal and computate the input frequency. Obviously, this is pretty un-accurate: +- 1 clock cycle on a 48MHZ FTM0 means that the measured frequency will vary from 5.33MHz to 4.79Hz. Not very good for my sake.
  2. Using FTM on CHn and count the number of edges in a bigger period. For example, FTM0 as input capture, FTM1 as reference. When a TOF IRQ is triggered on FTM1 I can estimate the frequency doing a simple divison:  Freq = (NumberOfEdges / MeasurementTime).
    1. Anyway, for a fast clock measurement in my sysyem this method seems to have a serious problem: nested IRQs. So I switched to FTM1 to FTM0 and check for the asserted flag into IRQ.
  3. Using FTM0 as an external clocked timer, set as upcounter and FTM1 as reference for a bigger period. BUT I can set up prescalers on FTM0 in order to slowdown the clock and prevent the nested IRQs trouble.
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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Luca,

If the external tested signal clock frequency is very high for example 5MHz in your case, I think you can use the high frequency clock to fill a signal with big period. This is the procedure:

1)From hardware perspective,connect the tested signal to FTM_CLKINx pin, for K22, it is multiplexed with PTA18.

2)From software perspective, set the CLKS as 11 in binary, in the case, the FTM will count the external tested clock.

3)I suggest you use PIT to generate an interrupt, in the ISR of PIT, you can read the FTM_CNT value, because the PIT period is known and fixed, you can figure out the tested signal frequency by the computing difference of two reading of FTM_CNT and dividing it by (PIT period).

4)maybe the above method is inaccurate due to indefinitive pipe line of software. If you want to get more accurate frequency, you can use capture mode of FTM, you can connect another low frequency clock signal to FTM_CHx, whose frequency is known. For example, you can use a 1KHz signal to FTM_CHx pin, in the ISR of capture, you can read the  FTM_CnV register to one variable, in the consecutive ISR of capture, you can read the FTM_CnV to another variable, compute the difference of the two variables, it is okay. you can use the Dual Edge Capture mode as JeremyZhou pointed out, in one ISR, you can read FTM_CnV and FTM_Cn+1V and compute the difference.

Hope it can help you.

BR

Xiangjun Rong

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Luca,

If the external tested signal clock frequency is very high for example 5MHz in your case, I think you can use the high frequency clock to fill a signal with big period. This is the procedure:

1)From hardware perspective,connect the tested signal to FTM_CLKINx pin, for K22, it is multiplexed with PTA18.

2)From software perspective, set the CLKS as 11 in binary, in the case, the FTM will count the external tested clock.

3)I suggest you use PIT to generate an interrupt, in the ISR of PIT, you can read the FTM_CNT value, because the PIT period is known and fixed, you can figure out the tested signal frequency by the computing difference of two reading of FTM_CNT and dividing it by (PIT period).

4)maybe the above method is inaccurate due to indefinitive pipe line of software. If you want to get more accurate frequency, you can use capture mode of FTM, you can connect another low frequency clock signal to FTM_CHx, whose frequency is known. For example, you can use a 1KHz signal to FTM_CHx pin, in the ISR of capture, you can read the  FTM_CnV register to one variable, in the consecutive ISR of capture, you can read the FTM_CnV to another variable, compute the difference of the two variables, it is okay. you can use the Dual Edge Capture mode as JeremyZhou pointed out, in one ISR, you can read FTM_CnV and FTM_Cn+1V and compute the difference.

Hope it can help you.

BR

Xiangjun Rong

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jqwang
Contributor II

Hi Xiangjun,

I'm trying to use MK22FN512VLL12 FTM Input capture function to calculate one frequency.

but i found the SDK 1.1.0 does not support FTM input caputer yet. So is there demo/example available?

"The FlexTimer module is a timer that supports input capture, output compare, and generation of PWM signals. The current Kinetis SDK driver only supports the generation of PWM signals. The input capture and output compare will be supported in upcoming Kinetis SDK releases."

thanks,

JQ

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Catosh
Contributor IV

Hello Xiangjun,

The approach using PIT was the best one for me.

Thank you very much for your support!

Luca.

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jeremyzhou
NXP Employee
NXP Employee

Hi Iuca,

FTM module support a enhance mode which calls Dual Edge Capture mode and this mode can measure a pulse width or period of the signal on the input of channel of a channel pair efficiently.

I'd like to highly recommend you to apply this method and you can find the detail information about the Dual Edge Capture mode in the RM.

Wish it helps.
Have a great day,
Ping

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