FTM0 input capture with counter reset not working as expected

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

FTM0 input capture with counter reset not working as expected

603 Views
reshma-nexgen
Contributor I

Hi,

I'm using the eval board TWR-KV46F-150M to test the input capture mode in FTM0 module. The input capture mode is not working as expected. I'm seeing the input capture ISR is executed however the counter does not reset at every falling edge of input capture  pin. I'm not able to set the ICRST bit.

The code used is uploaded in this post. In the code, a 50Hz PWM is generated at Pin 97 (J501.34) using eFLEX_PWM_A2. This is used as external trigger to the input capture module. Using external jumper wire Pin 97 (J501.34) is connected to Pin 46 (J502.12).

 Pin 46 (J502.12) is the input capture pin to FTM0_CH2. The captured values are stored in array falling_edge_array[]. If we put a break point in line 140, we can see the values stored in the array are not stable. 

This is mainly due to inability to set ICRST bit.

Need help on this issue.

 

 

 

 

 

 

Labels (1)
0 Kudos
1 Reply

562 Views
PabloAvalos
NXP TechSupport
NXP TechSupport

Hi @reshma-nexgen 

 

I would like to apologize for the delay. I got sick and couldn't write a response to you.

 

Regarding your issue with ICRST, as you mentioned that you are using FTM0 module, and cannot set this bit, it is because only FTM1 is capable to have this bit activated as it is shown in page 883 from RM.

PabloAvalos_0-1643064559226.png

 

Please try using FTM1 in your application so you can set this bit.

 

Please let me know if the problem persists, so I can help you further.

 

Thanks for your patience.
Best Regards.
Pablo Avalos.

0 Kudos