Hello,
I have an FRDM-KL26 MCU and I'm writing a TPM/PWM driver, but can't accomplish it, so I have a couple of questions:
1.TPM0 has 5 channels.It is possible to use all of these channels as input capture ?
2.I already configured one channel for input capture mode, but i can`t clear TOF(timer overflow flag) register in ISR. ( it is because another overflow occurred before i cleared first time ?)
Example of ISR:
void Io_Tpm_Tpm1Isr(void)
{
if(TPM_STATUS_REG(TPM1) & TPM_STATUS_TOF_MASK){ /* check if TOF is set */
TPM1_SC |= TPM_SC_TOF_MASK; /* Delete the TOF flag such that the IRQ ends */
}
if( TPM_STATUS_REG(TPM1) & TPM_STATUS_CH0F_MASK ){ /* CHANNEL 0*/
TPM_CnSC_REG(TPM1,IO_TPM_CHANNEL0) |= TPM_CnSC_CHF_MASK; /*Clear CHF - event occurred */
}else if(TPM_STATUS_REG(TPM1) & TPM_STATUS_CH1F_MASK){ /* CHANNEL 1*/
TPM_CnSC_REG(TPM1,IO_TPM_CHANNEL1) |= TPM_CnSC_CHF_MASK; /*Clear CHF - event occurred */
}
}
已解决! 转到解答。
Hi ALex Leonte,
Answer your two questions:
1.Yes, you can configure your 5 channels as the capture function.
2.When you enter in ISR, are you sure it is caused by the TOF, not the CHF? You can debug it in the ISR, find which interrupt flag caused this ISR.
If the ISR is caused by the TOF, you can clear it by write 1 to it.
Attached project is the KL26 TPM code, it can works ok on my FRDM-KL26, you can refer to it.
Wish it helps you!
If you still have question, please let me know.
Have a great day,
Jingjing
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Hi ALex Leonte,
Answer your two questions:
1.Yes, you can configure your 5 channels as the capture function.
2.When you enter in ISR, are you sure it is caused by the TOF, not the CHF? You can debug it in the ISR, find which interrupt flag caused this ISR.
If the ISR is caused by the TOF, you can clear it by write 1 to it.
Attached project is the KL26 TPM code, it can works ok on my FRDM-KL26, you can refer to it.
Wish it helps you!
If you still have question, please let me know.
Have a great day,
Jingjing
-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------
Channel interrupt and overflow interrupt have same ISR - TPM0 ISR, TPM1 ISR, TPM2 ISR.
So in each ISR you have to find out who caused it .
Status and Compare register can tell us depending on wich bit is 1.
In my project i use an overflow counter for duty cycle.