Sara
Up to the point when the device goes to a LLS or VLLS mode the debugger can be used as normal.
Once the mode is set the debugger will stop working and usually will disconnect. In some cases KDS will also hang and a PC restart may be needed to get the debugger to operate again.
Therefore it is not worth using a debugger (nor work with different connection modes) to test such modes - just load the program to the board and disconnect the debugger, or reset the board manually so that it runs "stand-alone" as it would do in a final product anyway. Then check the VLLS operation 'live'.
Regards
Mark
P.S. I have attached a binary that allows all low power modes to run on the FRDM-KL03Z. To test "live" do the following:
1. Connect to its VCOM port at 19200 Baud.
2. Hit the enter key to get a menu.
3. Go to menu '4' - the Administrator menu.
4. command "show_lp" to see the present low power mode. Eg.
show_lp
0 = RUN
1 = WAIT [active]
2 = STOP
3 = PSTOP1
4 = PSTOP2
5 = VLPR
6 = VLPW
7 = VLPS
8 = VLLS0
9 = VLLS1
10 = VLLS3
5. Command VLLS0 mode with "set_lp 8"
6. The board will 'freeze' in this mode and consume about 2uA of current.
7. Press the button "SW2" to wake up via port LLWU event, which results in a reset (the only way to exit VLLS0). Or press the reset button.