FRDM-KL03Z: Problems getting into VLLSx from Run

[sarastout-grand]

Hello,

I have successfully been able to get into VLLSx mode from Run mode with the attached code. The problem is that it doesn't work the first try. I have to always do a number of things (random as far as I can tell), including running the demo power handling example (power_manager_hal_demo) first. Once it finally goes to VLLSx mode, it will happily stay there until I shut down and will work perfectly. Very strange!

As an example, I will have the attached code working before I leave for the day. I will shut down my computer and the FRDM-KL03Z and go home. When I come in the next morning, and run the exact code that is still on the board, it does not go to the VLLSx mode. Even when I re-download the exact, unchanged code, it still doesn't work. Only after some random playing around does it seem to eventually, magically, decide to start working. All other lower power modes (VLPR, VLPS) work just fine from first try.

The demo power handling example always works first try from Run to VLLSx without any issues. I have reviewed that code to try to find what is different. Of course there are lots of differences since that code is quite complex, but I feel like my code is executing the important details. I must be missing something...

Any ideas?

Sara

Original Attachment has been moved to: main.c.zip

[sarastout-grand]

Hi Mark,

Sorry for the delayed response! On the same day that I got that previous reply from you, it starting working. I'm not certain that I understand how. I believe I did not have the RTC errata properly handled, but managed to get it by trial and error. It now works fine no matter what I do to it!

Just thought I'd let you know!

Thanks,

Sara

[sarastout-grand]

Hello!

Is anyone else out there more familiar with SDK framework who can tell me what is the difference between my code and the power_manager_hal_demo?

Basically, I have to run the power_manager_hal_demo before I run my code, after a power-off, to get my code to go to the VLLSx modes. I have compared as many registers as I can between the two sets of codes and don't see any differences. There must be some kind of register that is getting set in the power_manager_hal_demo code that my code does not set.

Here is what I know:

1. Once I run the power_manager_hal_demo, I can run my code without any problems and I can get into all the power modes as I expect. This means that whatever register is getting set, stays set between resets and code-downloads.

2. It is not clearing the PMC_REGSC_ACKISO bit, because I am doing that.

3. It is not related to the SMC_PMPROT bits because they are being set correctly.

4. I thought it was going to be the errata pertaining to the RTC flag. Enabling the RTC clock gate, disabling the time counter, clearing the RTC_SC[TIF] flag and then disabling the RTC clock gate does have an effect. It doesn't allow me to go to the low power mode that I select...it goes to 1.7mA, then immediately wakes up, as if triggered by an interrupt or something. It is not the interrupts that I have set, I have confirmed this. So...I'm not sure what the RTC bit of code is doing. It had an effect, but did not solve the problem.

Does anyone else have any ideas?

Thanks,

Sara

[mjbcswitzerland]

Sara

If you think that it is a sticky register making the difference do a screen shot of all register contents in the good and bad case; you should be able to see any difference then.

There is also the KSDK forum where you could also ask about your specific code.

In case problems continue why don't you just use the working example instead? It seems you have invested at least a month on this to date although there are various solutions that already exist?

Regards

Mark

[sarastout-grand]

Hi Mark,

I was indeed missing the RTC errata stuff. However, now that I have it included, it appears to have created another set of problems. Despite my having settings to go to VLLS0, it goes to a lower power, around 1.7mA, and then immediately wakes up. I thought maybe the RTC interrupts were the problem since immediately after I enable the RTC gate, all the flags in the RTC_IER register become set until I disable the RTC gate. I have tried specifically writing to these flags to ensure they don’t get set, but that doesn’t seem to change the outcome.

I was reading through the previous help file that you had included the link for. Is it possible to see what the utasker function “POWER_UP” and “POWER_DOWN” involves? Maybe I’m not dealing with the RTC properly.

Here is the code I'm using to deal with the RTC errata:

    SIM_SCGC6=0b00100000000000000000000000000000;//Enables the RTC clock gate
    RTC_SR=0b0000000000000000; //Disable the time counter
    RTC_TSR=0xFFFFFFFF; // Need to write to the RTC_TSR register to clear the RTC_SR[TIF] flag which gets set during POR and does not clear as per errata e8068.
    SIM_SCGC6=0b00000000000000000000000000000000;//Disables the RTC clock gate

I am currently clearing the PMC_REGSC_ACKISO bit. I am also very sure that the SMC_PMPROT bits are set correctly.

Any other ideas? Did you get a chance to look at my code? Something is happening in that Power_Management example that is not happening in my code. I have compared all of the registers in each and do not see a difference. I'm very frustrated!!

Thanks,

Sara

[mjbcswitzerland]

Sara

POWER_UP(6, SIM_SCGC6_RTC)

equates to SIM_SCGC6 |= 0x20000000;

and

POWER_DOWN(6, SIM_SCGC6_RTC)

to SIM_SCGC6 &= ~(0x20000000);

I don't work with the SDK framework so your code is not obvious to me (SDK is rather convoluted and one needs to  spend time working through the header files and macros that call macros, so it is a bit over-complicated to "quickly" see what may be wrong).

Are you doing this as a hobby or do you need to solve if for a professional project? If the second is true you could request support to get your code tested and corrected by a specialist at µTasker Professional Services 

It may cost $50 or so because your project will need to be debugged (either a complete code copy or via remote desktop on your board) but may be cheaper in the long run. If this is too expensive you may be able to make a service request to NXP to get one of their FAEs on to the job for you.

Regards

Mark

[sarastout-grand]

Thanks Mark.

Sara Stout-Grandy, M.Eng., Ph.D., P.Eng.

Senior Hardware Designer

20 Angus Morton Dr., Bedford,

NS, Canada, B4B 0L9

902-450-1700, x278

[sarastout-grand]

Since I wrote my question this morning, I have since determined that the problem occurs after the board's power is turned off. When turned on again, the only way I can get my code to run and enter VLLSx mode is by running the power example first. So...there is a register being set with something in the power example that does not go away when new codes are loaded onto the board, it only goes away when the power is turned off, but not while in VLLS0.

I hope this helps whoever looks into my problem!

Sara

[mjbcswitzerland · Accepted solution]

Sara

Maybe your code is missing the KL03 mask 1N86K workaround for errata 8068:
How can I know what is setting the STOPA bit on SMC_PMCTRL? 
Check also the PMC_REGSC register (won't be a problem getting in to VLLSx but may explain problems after).
Finally check your SMC_PMPROT setting since it is a write-once register and can explain why one low power mode works but others don't.

Regards

Mark

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