FRDM K64F Noise in ADC signal

[farhanfarooq93]

Hi,

I am using FRDM K64F ADC to Read Multiple Frequencies from 1khz to 0.1hz.

the signal received By the ADC is very noisy. below is the Matlab Plot of the signal received on ADC.

Any suggestion what is the problem?

[PaulMlhe]

Hello,

Currently, I have an identical problem on the ADC of the microcontroller.
I configured it in 16Bits in the standard settings. With these settings on the ADC, I am polluted by several clock signals causing me a noise of of 5mV.
I could find a beginning of answer in the document K64 Sub-Family Reference Manual pages 875 which explains to me that it is necessary to put the microcontroller in wait mode during the acquisition/conversion (what is impossible in my case of use) or to use as asynchronous clock 'the ADACK' and not the clock of the bus by default. This cas of use theoretically is supposed to reduce the noise of VDDA and thus to guarantee a better convertion.
If you have any practical information, I would be interested in your opinion.

BR

Paul Miailhe

[Alexis_A]

Hello Farhan,

There's some techniques to improve the sample accuracy, what you could done is to enable the continuous conversion and take the value of the sample in a timer interruption.

Also what it the transmission speed that you're sending through the serial COM to MATLAB and the sampling rate for the signal?

Best Regards,
Alexis Andalon