When setting up registers on the slave device, I must send multiple bytes. The n byte is written to the n register, sequentially.
In order to do this sequential register write access, I must hold the chip select line low (or continually assert it) between each byte transfer. It should never go high, until all of the bytes have been sent out from the K64 master.
The slave device requires that data be captured on the leading edge of the SCK signal. Thus, SPIx_CTARn[CPHA] is 0 and incompatable with implementing SPIx_CTARn[CONT].
With that said, I need to control the chip select line as a GPIO or manually. I cannot have the SPI module in hardware control it.
This is fairly easy to do for the KL27 in fsl_spi.h, however, not so clear in fsl_dspi.h for the K64.