I am trying send audio samples from the kinetis to a codec, using the FRDM K22F board.
I soldered the codec SGTL5000 in board and all necessary components to make it work.
It was used KDS 3.0.0 and processor expert, without KSDK.
The two hardware modules used to communicate with the codec are I2C and I2S.
For I2C, it was used the I2C_LDD component from processor expert, as show in figure below.
For I2S, it was used the I2S_Init component from processor expert, as show in figure below.
The I2C communication is working fine, and the codec respond to all the configuration commands that are sent.
But now I am trying send the audio samples via I2S to codec. The samples, bit clock (BCLK) and master clock (MLCK) rates was based in application notes taken from here: http://cache.nxp.com/files/microcontrollers/doc/app_note/AN4520.pdf and
http://cache.freescale.com/files/32bit/doc/app_note/AN4800.pdf .
The CPU core clock was set to 48 Mhz, as can show in figure below.
It was used a sample rate in 48 KHz. For this the MCLK must be 12.288 Mhz, and BCLK in 3.072 MHz.
This configuration was set in I2S_Init component as can be seen in figure below.
However, the codec was not emitting sound. So I decided see in oscilloscope the I2S pins. The figure below is a oscilloscope print from pins PTA5 (BCLK), in CH1, and PTC8 (MCLK), in CH2.
The clocks are distorted. The componentes was correctly soldered and based on xls document downloaded from here:
https://www.arrow.com/en/reference-designs/frdm-k22f-freescale-freedom-development-platform-for-the-...
I like to know how I resolve this issue.
The Project is attached below.
Thanks.
Original Attachment has been moved to: sgtl5000_Beans.rar
