External Crystal: What's the best config - Power & Size

[petertwiss]

Hello,

I am using a KL15(128KB/16KB/WLCSP) and using the 32.768 KHz internal RC oscillator as my main clock source. I use clock configurations with it:

- Clock Config 0: 21.97 MHz (default)

- Clock Config 1: 5.24 MHz (low power stuff, don't use the VLPR, as I wish to have I2C > 200 KHz, which you cannot do with VLPR Mode)

- Clock Config 2: 47.97 MHz (Algorithm Crunching)

All based on using the 32.768KHz RC and multiplied up by the FFL.

Now....this clock is terribly inaccurate. So I wish to add an external crystal, but I also want to keep this crystal as small as possible, and I want to minimize the impact of the power which will be added to the system when adding this crystal.

Here are my scenarios I can think of: **NEED Clock Config 1 and 2 frequencies with these scenarios. I need max speed for algorithms, and a low-budget speed just to grab data from sensors.

1) Use 32.768 KHz external: As small as 1.2mm x 2.0mm, which has 65 KOhms, and will work OK with KL15. Use this crystal to calibrate the RC every so often and run off RC. Power hit is almost negligible, but size is 1.2mm x 2.0mm

2) Always run off of a 32,768 KHz external. How much power will this add to our system? This is not in the KL15 Datasheet.

3) Use a 32 MHz crystal, and divide it down. How can I get clock config 2 (~48 MHz) with a 32 MHz crystal? Seems like this is not possible unless I can divide by 2 then multiply by 3. This crystal can be 1.2mm x 1.6mm. But will this crystal, given it's speed, cause an increase in power? Does the FLL running with a lower crystal use more power than say a 32 MHz crystal, with the crystal driving running faster?

Please reply to my questions, and thanks for the help,

-Peter

[Hui_Ma]

Hi Peter,

Please check the latest KL15 datasheet​, the page 12 table 10 provides the external 32KHz crystal clock added power consumption value.

When using external 32MHz crystal to generate system clock 48MHz, it need to use PLL.

Please set MCG_C5[PRIDIV0] bits value to 0xF(16) & MCG_C6[VDIV0] bits value to 0x0 (24).

It could get the power consumption data for 4MHz crystal clock is 237uA and 32KHz crystal clock power consumption is 0.54uA.

The higher frequency crystal will consume more power.

The FLL will cause the same power consumption for the reference clock is same, while the crystal itself also consume power (high frequency crystal with higher power consumption).

Wish it helps.

Have a great day,
Ma Hui

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