Disable read coherency mechanism for dual edge capture on FTM

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Disable read coherency mechanism for dual edge capture on FTM

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aberger
Contributor IV

When an FTM module is set up for dual edge capture, can the "read coherency mechanism" (Section 40.4.24.5 of K64 Reference Manual) be disabled? That is, I would like to always--and instantly--capture the value of both rising and falling edges to their respective C(n)V and C(n+1)V registers. I do not want to wait until a falling edge to record the the counter value of the paired rising edge, as is enforced by the read coherency mechanism. Is this possible?

I suppose that one possible way would be to physically wire the signal to two different pins, corresponding to the C(n)V and C(n+1)V inputs, and have each monitor only the rising or falling edge, rather than having a single pin monitor both rising and falling edges. However, this seems unnecessarily complicated.

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Andy,

I do not think that you can disable "read coherency mechanism",  the "read coherency mechanism" is operation mechanism of dual edge capture mode.

Regarding your requirement that I would like to always--and instantly--capture the value of both rising and falling edges to their respective C(n)V and C(n+1)V registers, I think you have two options, one option is connecting the captured signal to both FTM_CHn and FTM_CHn+1 channels as you have pointed out, both channels is set up as normal "input capture mode", pls refer to section 40.4.4 Input Capture mode, one channel is set up as for example rising edge, another channel is set up as falling edge, it is okay.

Another option is that you only connect the captured signal to only ONE channel FTM_CHn, you can set up the capture mode as normal "input capture mode", and set the ELSnB:ELSnA=11, which means capturing on both rising or falling edge, you can read the GPIOx_PDIR register to know the rising or falling edge. You can read the GPIOx_PDIR register to get the pin logic even if you configure the pin as FTM function.

Hope it can help you.

BR

Xiangjun rong

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xiangjun_rong
NXP TechSupport
NXP TechSupport

Hi, Andy,

I do not think that you can disable "read coherency mechanism",  the "read coherency mechanism" is operation mechanism of dual edge capture mode.

Regarding your requirement that I would like to always--and instantly--capture the value of both rising and falling edges to their respective C(n)V and C(n+1)V registers, I think you have two options, one option is connecting the captured signal to both FTM_CHn and FTM_CHn+1 channels as you have pointed out, both channels is set up as normal "input capture mode", pls refer to section 40.4.4 Input Capture mode, one channel is set up as for example rising edge, another channel is set up as falling edge, it is okay.

Another option is that you only connect the captured signal to only ONE channel FTM_CHn, you can set up the capture mode as normal "input capture mode", and set the ELSnB:ELSnA=11, which means capturing on both rising or falling edge, you can read the GPIOx_PDIR register to know the rising or falling edge. You can read the GPIOx_PDIR register to get the pin logic even if you configure the pin as FTM function.

Hope it can help you.

BR

Xiangjun rong

View solution in original post