Configuring non-JTAG pins on PORTA breaks JTAG with K24

[ryanlush]

This bit of code seems to kill my JTAG. None of these signals are associated with JTAG so I don't understand what the problem is. I have commented them out one after another and any one of the GPIO_PinInit functions kills the communication. The only one that kinda makes sense is PA4 being the EzPort CS/NMI but the rest of them make no sense at all. Any idea what I'm doing wrong here?

#define ANT_BOOT_PORT           PORTA
#define ANT_BOOT_PIN            4
#define ANT_BOOT_CFG            kGPIO_DigitalOutput
#define ANT_BOOT_MUX            kPORT_MuxAsGpio
        
#define ANT_RST_PORT            PORTA
#define ANT_RST_PIN             6
#define ANT_RST_CFG             kGPIO_DigitalOutput
#define ANT_RST_MUX             kPORT_MuxAsGpio
        
#define OLED_RS_PORT            PORTA
#define OLED_RS_PIN             24
#define OLED_RS_CFG             kGPIO_DigitalOutput
#define OLED_RS_MUX             kPORT_MuxAsGpio
        
#define OLED_RST_PORT           PORTA
#define OLED_RST_PIN            25
#define OLED_RST_CFG            kGPIO_DigitalOutput
#define OLED_RST_MUX            kPORT_MuxAsGpio
        
#define OLED_PWR_PORT           PORTA
#define OLED_PWR_PIN            26
#define OLED_PWR_CFG            kGPIO_DigitalOutput
#define OLED_PWR_MUX            kPORT_MuxAsGpio

    ///////////////////////////////
    ////////// PORTA //////////////
    ///////////////////////////////
    CLOCK_EnableClock(kCLOCK_PortA);

    // GPIO    
    PORT_SetPinMux(ANT_BOOT_PORT,  ANT_BOOT_PIN, ANT_BOOT_MUX);         
    PORT_SetPinMux(ANT_RST_PORT,   ANT_RST_PIN,  ANT_RST_MUX);         
    PORT_SetPinMux(OLED_RS_PORT,   OLED_RS_PIN,  OLED_RS_MUX);         
    PORT_SetPinMux(OLED_RST_PORT,  OLED_RST_PIN, OLED_RST_MUX);         
    PORT_SetPinMux(OLED_PWR_PORT,  OLED_PWR_PIN, OLED_PWR_MUX);         

    GPIO_PinInit(ANT_BOOT_PORT,  ANT_BOOT_PIN, &(gpio_pin_config_t){ANT_BOOT_CFG, 0} );      // PA4
    GPIO_PinInit(ANT_RST_PORT,   ANT_RST_PIN,  &(gpio_pin_config_t){ANT_RST_CFG,  0} );            // PA6
    GPIO_PinInit(OLED_RS_PORT,   OLED_RS_PIN,  &(gpio_pin_config_t){OLED_RS_CFG,  0} );           // PA24
    GPIO_PinInit(OLED_RST_PORT,  OLED_RST_PIN, &(gpio_pin_config_t){OLED_RST_CFG, 0} );        // PA25
    GPIO_PinInit(OLED_PWR_PORT,  OLED_PWR_PIN, &(gpio_pin_config_t){OLED_PWR_CFG, 0} );    // PA26

[ryanlush · Accepted solution]

GPIO_PinInit should have been called with GPIOA rather than PORTA

#define ANT_BOOT_PORT           PORTA

#define ANT_BOOT_GPIO           GPIOA
#define ANT_BOOT_PIN             4
#define ANT_BOOT_CFG            kGPIO_DigitalOutput
#define ANT_BOOT_MUX            kPORT_MuxAsGpio

PORT_SetPinMux(ANT_BOOT_PORT,  ANT_BOOT_PIN, ANT_BOOT_MUX);  

GPIO_PinInit(ANT_BOOT_GPIO,  ANT_BOOT_PIN, &(gpio_pin_config_t){ANT_BOOT_CFG, 0} );      // PA4

[ryanlush]

In fsl_gpio.h (standard KSDK code) you have

/*!
 * @brief Sets the output level of the multiple GPIO pins to the logic 1 or 0.
 *
 * @param base    GPIO peripheral base pointer (GPIOA, GPIOB, GPIOC, and so on.)
 * @param pin     GPIO pin number
 * @param output  GPIO pin output logic level.
 *        - 0: corresponding pin output low-logic level.
 *        - 1: corresponding pin output high-logic level.
 */
static inline void GPIO_PinWrite(GPIO_Type *base, uint32_t pin, uint8_t output)
{
    if (output == 0U)
    {
        base->PCOR = 1U << pin;
    }
    else
    {
        base->PSOR = 1U << pin;
    }
}

I'm pretty sure that should be

base->PCOR |= 1U << pin;

and

base->PSOR |= 1U << pin;

[ryanlush]

I'm wrong. Writing a 0 to those registers has no effect. Still lost...