Can the Kinetis KL17 wake from VLPS mode based on an I2C address decode?

[dougbaker]

I have a KL17 that I put into VLPS mode and would like to wake up based on an I2C message received from another embedded CPU.  The Kinetis is an I2C slave device and the I2C driver is implemented using callbacks so it is using IRQ’s.  I can confirm that the I2C on the Kinetis is working since it can send and receive I2C messages.  I can also confirm that I can put the CPU into the VLPS mode and wake it up using an alarm on the Real Time Clock.  What I have not done yet is wake the CPU up from an I2C message.   According to the datasheet AN4503 “Power Management for Kinetis MCU’s” table 5 page 59, the I2C in the Kinetis is “static, address match wake up”.   

http://www.nxp.com/docs/en/application-note/AN4503.pdf

I am assuming that because the Kinetis is a slave, the clock from the other processor will run the I2C device on the kinetis and allow an address match to wake the CPU up.   If the I2C device is “static” in VLPS, can it be used to wake up with a valid address match? 

Thanks,

Doug

[dougbaker]

Thanks for the information.  I am going to try wait/sleep mode instead and see if that works better as far as I2C communication when in low power mode. 

Doug

[dougbaker]

I have the CPU waking up from VLPS mode based on a I2C address match.  My question is in the document section 34.5.8 it says: "After the system recovers and is in run mode, restart the I2C module if needed to transfer packets."  I do not understand the statement. Currently the Kinetis will wake up on an I2C address but that I2C transaction will fail to complete but it will get the CPU running again.  Should I expect the first I2C transaction that wakes the Kinetics up to complete normally or will the I2C transaction that woke the Kinetis up error out?  The scope shows the I2C address and first byte from the master is OK when it wakes up the Kinetis from VLPS but it shows an I2C bus error after the first byte about where the repeat start would be.

Also in that same section of the document, it says. "After I2C address matching, the matching wake-up, the master must wait a time long enough for the ISR to finish running and resend start or repeat start signals."  In our case the master is another CPU so is the statement I quoted for the Kinetis if it is a master or is it for the other embedded processor that is the master?

Thanks,

Doug

[Hui_Ma]

Hi,

The Address matching wake-up only works when KL17 I2C in slave receive mode.

My colleague had done a test about if I2C module could continue to receive/transmit data during the same I2C transaction after it was woken up by address match from VLPS.

The test result is the slave receives the address but after the address the most of the times slave hold the SDA line for a small pulse and then the master decide to Stop the communication. It seems that the I2C module is not completely competent after woken up to perform complete functionality.

So, it is recommend to reinitialize the I2C module after it is woken up.

I also attached the test code for your reference (the test is based on KL25 product).

Thank you for the attention.

Have a great day,
Ma Hui

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[gartin]

Hi Ma Hui

In my application, the I2C slave is supposed to sleep most of the time and should get waked up by an address match. I also experienced a strange behavior on the bus and the following bytes after the address didn't get received. In the datasheet they mention:

After the system recovers and is in Run mode, restart the I2C module if it is needed to transfer packets. The SCL line is not held low until the I2C module resets after address matching. The main purpose of this feature is to wake the MCU from a low power mode where no peripheral bus is running. When the MCU is in such a mode: addressing as a slave, slave read/write, and sending an acknowledge bit are not fully supported.

Is there a recommended way to restart the I2C module? It would be nice to have a working example where the slave sleeps and wakes up by an address match and then receives the remaining bytes of the I2C transaction.

Thanks

Martin

[Hui_Ma]

Hi,

The KL17 I2C module support address matching wake-up the chip from VLPS mode.

Please check KL17 reference manual chapter 34.5.8 about Address matching wake-up.

Thank you for the attention.

Have a great day,
Ma Hui

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