Can't make the watchdog timer interrupt to work in Freescale K60 microcontroller

[yoffie]

Hi, Did anyone have any problems with making the WDOG interrupt working? Did anyone make it to work? Everything looks okay in my code, however WDOG interrupt is not generated before WDOG reset. (WDOG interrupt is enabled is NVIC, IRQRSTEN bit is set in WDOG ctrl register) Other than that, all other WDOG features work properly. Thanks, Yoffie

[konrada]

I get WDOG interrupts on the K70, but...

1. if the handler is in external RAM, most of the 256 cycles will be wasted waiting for instructions to be fetched
2. breakpoints in the handler aren't reached.

How do you check whether your ISR is run? You could write a magic constant into a VBAT register (which survives reset).

[Nana]

I have the same problem, do you find any solution to this problem ?

All my wdog futures seems to work ok only the interrupt don't work ! I'm not using the MQX RTOS!

[ignisuti]

Also having a issue with this. Here is what I have. Can someone from support please respond to this thread?

void WATCHDOG__initialize  (  void  )    {    /* Enable interrupts for Watchdog. */    ARM_CORTEX_M4__enable_interrupt( INT_Watchdog );             /* Unlock and enable the Watchdog timer. Configure interrupt. */    WDOG_UNLOCK = 0xC520;  WDOG_UNLOCK = 0xD928;    WDOG_STCTRLH |= WDOG_STCTRLH_WDOGEN_MASK;    WDOG_STCTRLH |= WDOG_STCTRLH_IRQRSTEN_MASK;        } /* WATCHDOG__initialize() */

[ignisuti]

Update on my earlier post...

I thought my code would set the IRQRSTEN bit, but when I stepped through the debug code, I could see it was not. This is because that register only allows writing to it once during a change period.

So, by combining two lines into one, I was able to get my interrupts working. 

WDOG_STCTRLH |= WDOG_STCTRLH_WDOGEN_MASK | WDOG_STCTRLH_IRQRSTEN_MASK;