Can MKL03Z32CAF4 processor be woken from LLWU by lptmr

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Can MKL03Z32CAF4 processor be woken from LLWU by lptmr

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tedmawson
Contributor III

I want to put my MKL03Z32CAF4 processor into a low power state LLWU and have it wake from either:

  • Switches connected to the LLWU pins - this seems easy or
  • The lptmr reaching a count - not sure if this is supported?

Para 19.1 in the Reference Manual says...

"This device has no LLWU module wakeup source and uses the external pin inputs only

of LLWU_P4 and LLWU_P7 as wakeup source to the LLWU module. The internal

peripheral interrupt flags are connected to the platform directly.

Hence, only the following registers and fieldsare functional for this device:

• LLWU_PE2: [WUPE7] and [WUPE4]

• LLWU_F1: [WUF7] and [WUF4]

• LLWU_FILT1"

Am I stuck using the external pins only?

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dereksnell
NXP Employee
NXP Employee

Hi Ted,

Looking at the source code for LLWU_HAL_SetExternalInputPinMode(), it appears you can call it multiple times for the different pins. If you have any issues, this API sets the LLWU_WUPE registers.  So you can use the debugger, and step through the code and view the LLWU registers to ensure they are configured as needed.

When waking from VLLSx modes, the MCU resets.  And you will need to re-initialize most of the peripheral registers.  You may also need to release the hold on the I/O pins and the oscillator.  See Appnote AN4503 which describes the Kinetis low-power modes in detail, and the wake-up from VLLSx modes.

For GPIO interrupts, you can refer to the KSDK GPIO example \KSDK_1.3.0\examples\frdmkl03z\driver_examples\gpio which configures an input pin for interrupt. Also the KSDK power manager example at \KSDK_1.3.0\examples\frdmkl03z\demo_apps\power_manager_hal_demo configures a LLWU pin to wake the MCU from low-power modes.

Thanks

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dereksnell
NXP Employee
NXP Employee

Hi Ted,

LLWU is a peripheral in the MCU, that is used to wake from the low-leakage stop modes, LLS and VLLSx (note that the KL03 does not support the LLS mode).  And yes, the LPTMR can wake the MCU from those low-leakage stop modes, see snippets below from the KL03 reference manual:

chip power modes.jpg

Modules in low-power modes.jpg

Notes.jpg

LPTMR modes.jpg

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tedmawson
Contributor III

Derek,

I have my KL03 program running in VLPR mode (2MHz IRC) in a program based off the lptmr example for KDS.  I basically have a 200 mS tick timer running on the lptmr and once I have done all the processing necessary for that particular tick, I'd like to go to a VLLSX mode and wait for the next interrupt to occur.  It seems like VLLS3 is preferable as it maintains all SRAM contents and pulls 2 uA Vdd.

If I go that route, I'm slightly confused about program flow after the interrupt wake up, the documentation says...

Upon a wake-up event, the WAKEUP bit in the SRS register is set and the MCU executes the code from the reset vector. Then the LLWU NVIC interrupt is executed when the LLWU interrupt vector is enabled.

I think that means that all me setup code that occurs on a cold boot will happen except that I can test the SRS register and jump past it if I find my reset was caused by the lptmr interrupt waking me from VLLS3 but at some point, the interrupt callback routine is going to be executed so then what happens?  Can you clarify this for me?

Thanks :smileygrin:

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dereksnell
NXP Employee
NXP Employee

Hi Ted,

Yes, waking up from the VLLSx power modes wakes by resetting the MCU.  The application can read the reset source in the SRS registers, and if the WAKEUP bit is set, the application can execute differently knowing it woke from VLLSx mode.  Once enabled, the LLWU interrupt service routine is executed, unless the source of the interrupt is cleared by software before the LLWU interrupt is enabled.

Appnote AN4503 is beneficial when using low power modes in Kinetis.  It covers all this in detail, including all the power modes, and how to enter, wake up, and exit the power modes.

Thanks

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tedmawson
Contributor III

OK, so I have my program running and it has the following features:

  • KL03 running off internal 2 MHz LIRC in VLPR mode
  • LPTMR running generating interrupts every 200 mS and being serviced by an ISR callback
  • Two pins, PTA0 and PTB0 configured as inputs with weak pull down, these were chosen because they are also LLWU_P7 and LLWU_P4

Currently, the program loops around a while(1) loop until an interrupt occurs and the stae of the buttons is tested during every interrupt. I now want to implement VLLS3 (or VLLS2) so that I save power; the LPTMR will keep running because it's using the 1kHz Low Power Clock  as its prescalerClockSource.  The low power guide example (p19) says I need to:

  1. Configure a GPIO pin that will be used to wake from LLS mode.
  2. Configure pin as digital input
  3. Configure LLWU module pin PORTC6 (LLWU_P10) as a valid wake-up source.

My pins are already set up as digital inputs and they are generating interrupts so I think 2 is covered.  But for 1 I need to set up the LLWU so that either pin will wake up the LLWU, the example code I'm looking at is this...

SIM_HAL_EnableLlwuClock(SIM_BASE, HW_LLWU); // this bit may not exist on some MCUs

LLWU_HAL_ClearExternalPinWakeupFlag(LLWU_BASE, 10u);

//falling edge detection

LLWU_HAL_SetExternalInputPinMode(LLWU_BASE, kLlwuExternalPinFallingEdge, kLlwuWakeupPin10);

so if I keep the first 2 statements and then use this statement...

LLWU_HAL_SetExternalInputPinMode(LLWU_BASE, kLlwuExternalPinRisingEdge, kLlwuWakeupPin4);

I think I'll set the LLWU to wake up from one pin but if I then say

LLWU_HAL_SetExternalInputPinMode(LLWU_BASE, kLlwuExternalPinRisingEdge, kLlwuWakeupPin7);

will that make both pins work or just one?

I also want to use the LPTMR interrupt to wake up but I now think this is not set in the LLWU, it's simply done by enabling the interrupt for the LPTMR and this is already done in the LPTMR initialization so am I good to go on that matter?

Any guidance for the steps I'll need to follow when I wake up are welcome; when the LPTMR interrupt causes an LLWU wakeup, I think I need to clear the interrupt for the LLWU first in a separate callback and then allow the normal LPTMR ISR to run.  Assuming I'm right on this, what re-initialization will I need to perform?

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tedmawson
Contributor III

Typo above - my pins PTA0 and PTB0 are NOT generating interrupts, just the LPTMR is.

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