Hello,
I am using a Kinetis MK21FN1M0V12. I linked its EXTAL0 and XTAL0 pins to a 24MHz quartz (with two 10pF load capacitors).
I would like to use the 24MHz OSCCLK clock generated by the OSC module as main clock (MCGOUTCLK). I attached to this message the clock path I would like to use.
However, I cannot go from MCG mode FEI (default reset mode using internal clock and FLL) to MCG mode FBE (using external clock, with FLL active but disconnected) because my 24MHz OSCCLK cannot be divided by FRDIV into the 31-39kHz range required by the FLL: FRDIV value would need to be around 750 but the two closest values are 512 and 1024, which are both putting the frequency out of range (23kHz and 47kHz).
I cannot access modes BLPE and PBE either because they can only be reached through mode FBE.
I tried to cheat my way out by using the RTC clock as external clock instead of OSCCLK, going to mode BLPE and then switching OSCSEL back to OSCCLK but the MCU crashed, this operation does not seem to be allowed.
How can I use OSCCLK as MCGOUTCLK in this case? Is there a solution or is 24MHz a forbidden value for this specific use?
Thanks in advance for your answers,
