Hi.
The 32.5.6 Calibration function of Kinetis KM34 Sub-Family Reference Manual, Rev. 3, 09/2017 describes how to return the value saved at startup to the register as follows.
Overall, the calibration routine may take as many as 14k ADCK cycles and 100 bus cycles, depending on the results and the clock source chosen. For an 8 MHz clock source, this length amounts to about 1.7 ms. To reduce this latency, the calibration values, which are offset, plus-side gain, and plus-side calibration values, may be stored in flash memory after an initial calibration and recovered prior to the first ADC conversion. This method can reduce the calibration latency to 20 register store operations on all subsequent power, reset, or Low-Power Stop mode recoveries.
①
Are the registers shown here as follows?
offset: ADCx_OFS
plus-side gain: ADCx_PG
plus-side calibration values: ADCx_CLPD, ADCx_CLPS, ADCx_CLP4-0
②
The manual says 20 register store, but if you count the above registers, it's nine.
What do the 20 texts in the manual refer to?
