Bug in MKL25Z4.h for Initializing UART0 BDH?

[alexdean]

I'm looking at the MKL25Z4.H macros for UART0 Baud Rate Generation. The UART0_BDH_SBR(x) macro doesn't seem to take the upper five bits of x, but I believe it should. Is this a bug, am I misusing the macro, or is there a newer version of the file available?

#define UART0_BDH_SBR_MASK  0x1Fu
#define UART0_BDH_SBR_SHIFT 0
#define UART0_BDH_SBR_WIDTH 5
#define UART0_BDH_SBR(x)    (((uint8_t)(((uint8_t)(x))<<UART0_BDH_SBR_SHIFT))&UART0_BDH_SBR_MASK)‍‍‍‍‍‍‍‍

Here's the version information for the file:

/*
** ###################################################################
**     Processors:          MKL25Z128FM4
**                          MKL25Z128FT4
**                          MKL25Z128LH4
**                          MKL25Z128VLK4
**
**     Compilers:           Keil ARM C/C++ Compiler
**                          Freescale C/C++ for Embedded ARM
**                          GNU C Compiler
**                          GNU C Compiler - CodeSourcery Sourcery G++
**                          IAR ANSI C/C++ Compiler for ARM
**
**     Reference manual:    KL25P80M48SF0RM, Rev.3, Sep 2012
**     Version:             rev. 2.5, 2015-02-19
**     Build:               b150721
**
**     Abstract:
**         CMSIS Peripheral Access Layer for MKL25Z4
**
**     Copyright (c) 1997 - 2015 Freescale Semiconductor, Inc.
**     All rights reserved.
*/‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

[alexdean]

Thanks, now it makes sense. The SHIFT and mask values are from the perspective of each register, rather than the value SBR which spans two registers. So the source code has to extract the upper byte of the desired SBR value before calling the macro.

[mjbcswitzerland · Accepted solution]

Hi

UART0_BDH has only 5 bits in the divisor and the last three are used for different functions:

The macro is masking the upper 3 bits (not upper 5) and is therefore OK.

Regards

Mark