About KM34 16-bit ADC voltage reference

[jeff-jianfeng_l]

Hi,

I'm using KM34Z256VLL7 in my design, and I have some problem about how to use VREFH and VREFL.

Can the VREFL be connected to GND and VREFH use the internal reference 1.2V, so the ADC input signal range can be 0V~1.2V?

[MarMi]

Hello,

16-bit SAR ADC and AFE reference sources are selected using different switches S0 and S3. This means that you can, for example operate, 16-bit SAR ADC with 3.3V external reference (taken from SAR_VDDA) and AFE with internal 1.2V VREF.

In power metering reference designs we ever built we have always selected internal 1.2V VREF as the reference for both AFE and SAR ADC operation.

Kind regards,

Martin M.

[MarMi · Accepted solution]

Hello,

you can do this. Below is the internal voltage reference signal integration diagram:

 

Two 100 nF capacitor must always be connected between VREFH and VREFL and VSSA if the internal 1.2V reference is being used. In addition, you can control switches S0, S1, S2 and S3 to propagate 1.2V reference to internal analogue blocks or even externally on VREF pin.

Because there are much more options to control VREF module, you can use / learn from SW drivers KMSWDRVAPIRM_SW (refer to readme.htm, section VREF). Using software drivers, you can configure VREF module easily in any supported configuration. For example the following sw routine configures internal reference to supply analogue blocks with 1.2V, BUF enabled and switches S1, S2 and S3 set to low.

#include "drivers.h"

void main (void)

{

SIM_Init (SIM_MODULE_ALL_PERIPH_ON_CONFIG);

/* voltage reference sourced from the internal 1.2V bangap reference */

VREF_Init (VREF_MODULE_CHOP_EN_ICOMP_EN_REG_EN_VREFL_EN_LPWR_CONFIG,

VREF_SWITCH_S1_L_S2_L_S3_L_BUFF_EN);

VREFL_Trim(3);

while(1);

}

Kind regards,

Martin M.

[jeff-jianfeng_l]

Hi Martin,

Another question is that if the reference is changed, whether it also affect the AFE reference? Will the AFE VCM (input common mode reference) and VINdiff (Differential input range)  be changed?

[jeff-jianfeng_l]

Hi Martin,

Thank you for your help.

According to your answer, may I understand as two100 nF capacitor must always be connected between VREFH and VREFL and VSSA,  VREFL can be configured to GND in the internal block by software if I want to set the 16-bit ADC reference  VREFL=0V,VREFH=1.2V? VREFL connect to GND external is not necessary?

[MarMi]

Hello,

VREFH & VREFL pins on package refer to the 24-bit SD-ADC and require 100nF capacitors between VREFH and VREFL and VSSA.

Another VREFL & VREFH signals of the 16-bit SAR ADC are also present on device but they are internally connected to SAR_VSSA & (SAR_VDDA or 1.2V VREF), respectively. Whether 16-bit SAR ADC is referenced from SAR_VDDA or 1.2V VREF, it is controlled by the S0 switch.

Kind regards,

Martin M.