AN4370 DFU Bootloader for KL25Z, clock setup issues

[allankliu]

I have tried software from AN4370 on IAR EW650+FRDM-KL25Z. It doesn't work. When I look into debugger. It has nothing to do with GPIO differences between TWR and FRDM, it is hung in clock setup pll_init().

main_kinetis.c pll_init()

        SIM_CLKDIV1 = 0x1003000 // OUTDIV1 = 0x01, OUTDIV4 = 0x03

        MCG_C2 = 0x2D // RANGE=2, HGO=1, EREFS=1, LP=0, IRCS=1

        MCG_C1 = 0x98 // CLKS=2, FRDIV=3

       ......

        #ifndef EXTERNAL_OSC

            /* wait for oscillator to initialize */

            while (!(MCG_S & MCG_S_OSCINIT_MASK)) //<=== loop forever for OSCINIT

            {;}

        #endif

I am not familiar with KL25Z so far. Can anyone explain it?

I found other samples for KL25Z for CDC device demo, its register setup is:

        SIM_CLKDIV1 = 0x1001000 (OUTDIV1 =1, OUTDIV4=1)

        MCG_C2 = 0x94 ( LOCRE=1, RANGE=1, HGO=0, EREFS=1)

        MCG_C1 = 0x98

        MCG_S = 0x0A

MCG, it seems SIM_CLKDIV1/MCG_C2 have difference values with identical 8MHz crystal.

[DerekLau · Accepted solution]

Change the value of MCG_C2 as the following:

//    MCG_C2 = MCG_C2_RANGE(2) | MCG_C2_HGO_MASK | MCG_C2_EREFS_MASK | MCG_C2_IRCS_MASK;

   MCG_C2 = (MCG_C2_LOCRE0_MASK | MCG_C2_RANGE0(1) | MCG_C2_EREFS0_MASK);