Could you give us your advice on using the ADC within a S9KEAZ128AMLH.
In the 64pin package both VREFH and VDDA share the same pin and from the table below, the limits for VDDA indicate to stay within 0.3V of VDD (VDD is 3.3V)
Erroneously we had connected VDDA/VREFH pin to 1.65V in order to better map the ADC input range to the input signal, and in testing the output data from the ADC appears to function normally and achieved the desired effect.
Can you advice on the implications of supplying 1.65V for VDDA/VREFH rather than the nominal 3.3V.
Does VDDA power/or bias internal circuitry, or is its purpose solely as a reference level for both the ADC/comparator?
Hi Daniel Wax,
If you are using the 64pin package , I don't think you can connect the VDDA/VREFH pin to 1.65V, just as you list the KEA datasheet picture shows:
The VDDA should in the range of (VDD-0.3, VDD+0.3), normally, VDDA connect to the VDD.
So, if you want the VREFH as 1.65V, I suggest you to choose the 80 LQFP package, that package has separated VDDA and VREFH.
Have a great day,
Kerry
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Thanks for the response Kerry. Yeah I know they are setup outside the datasheet allowances. And I understand that VREH>than VCCA by more than 0.3v could be damaging but Im not convinced yet that VREH less than VDDA-0.3 is possible to damage anything
The LDO they have feeding VREFH is only consuming 19ma and a reference (table 5.4.2) in the comparator section of the datasheet lists that IDDA (current into VDDA) is in the order of a few tens of uA’s.
If, in (table 5.4.1) VREFH could be connected to 1.65V then why is VDDA limited to 2.7V as this package option has combined the two pins into one.
Perhaps VDDA is used for internal biasing of only the comparator section?
What could possibly get damaged with this wrong setup? I just need a little more reason to tell them to redesign it. Thsi part has been shipping in a production vehicle for a couple years and if there is a risk to have the part damaged eventually they need to know about it.
Hi Daniel Wax,
Thank you for your updated information.
Yes, VREFH can be connected to the source less than VDDA, from the datasheet, we can know the VREFH range:
But, please note , the VDD-VDDA can't be largher than +/- 100mV.
The 64 pin package, VDDA and VREFH connected together internally.
So, not the VREFH limit the voltage range, it is VDDA.
Do you mean our customer already use the 64 pin package, and connect VDDA to 1.65V, VDD 3.3V in the application for a couple years?
About what could possibly get damaged with this wrong setup, I think we need to check it with our design department.
I find you are my colleague, actually, we have a internal community for NXP internal engineer to post the question:
Can you enter it?
If you can't enter it, I will help you check the details from our internal side.
Have a great day,
Kerry
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I’m sorry yes 64 pin package and they have vdda connected to 3.3 volts and vrefh at 1.65v. So if it’s internally connected will these two different voltages on the same internal place will there be potential for reducing the longevity of the part?
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Daniel Wax | Field Applications Engineer Automotive
NXP Semiconductors
411 E Plumeria Dr
San Jose, CA 95134
office: 408-518-5533
mobile: 408-981-9220
daniel.wax@nxp.com<mailto:daniel.wax@nxp.com>
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Hi Daniel Wax,
Please follow this post:
ADC VREFH/VDDA on KE/KEA series
Have a great day,
Kerry
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I am also interested in this problem. I use the KE04Z 64pin MCU, But I can't enter the link of "ADC VREFH/VDDA on KE/KEA series "
Is possible to tell me what will happened in the design of VDD-VDDA>100mV.
Hi YICHAN FANG,
I suggest you connect VDD and VDDA together in your board.
If you still have questions, you can create your own question post, the link you mentioned is the nxp internal community, it can't share with customer. This question post author is also from NXP side, then I let him go to the internal side.
Have a great day,
Kerry
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They are already using the 64 pin package
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Daniel Wax | Field Applications Engineer Automotive
NXP Semiconductors
411 E Plumeria Dr
San Jose, CA 95134
office: 408-518-5533
mobile: 408-981-9220
daniel.wax@nxp.com<mailto:daniel.wax@nxp.com>
All types of technical support (Schematic review, layout review, software review, hardware board and software) provided
by NXP Field application team are subject to NXP's general Terms and Conditions unless superseded by a direct contract.
The information contained in this message is confidential and may be legally privileged. The message is intended solely for the addressee(s). If you are not the intended recipient, you are hereby notified that any use, dissemination, or reproduction is strictly prohibited and may be unlawful. If you are not the intended recipient, please contact the sender by return e-mail and destroy all copies of the original message.
Unless otherwise recorded in a written agreement, all sales transactions by NXP Semiconductors are subject to our general terms and conditions of commercial sale<http://www.nxp.com/about/our-terms-and-conditions-of-commercial-sale:TERMSCONDITIONSSALE?fsrch=1&sr=1&pageNum=1>.