Hi TIC,
Prevas is designing on RT1052 based PCB, Where they need to use a 64MB SDRAM (ISSI IS42S16320F-6BLI, 16 bit data).
Prevas are only able to address the first 32MB even though BR0-3 and SDRAMCR0-3 should be set up corectly.
You find the setup below:
BR0-8 is set to default value´s i.e. only SDRAM CS0 is activ, 64MB and started from 0x80000000 :
/* #1.94, command: write_value, address: SEMC_BR0, value: 0x8000001D, size: 4 */
0x40, 0x2F, 0x00, 0x10, 0x80, 0x00, 0x00, 0x1D,
/* #1.95, command: write_value, address: SEMC_BR1, value: 0x8400001C, size: 4 */
0x40, 0x2F, 0x00, 0x14, 0x84, 0x00, 0x00, 0x1C,
/* #1.96, command: write_value, address: SEMC_BR2, value: 0x8800001C, size: 4 */
0x40, 0x2F, 0x00, 0x18, 0x88, 0x00, 0x00, 0x1C,
/* #1.97, command: write_value, address: SEMC_BR3, value: 0x8C00001C, size: 4 */
0x40, 0x2F, 0x00, 0x1C, 0x8C, 0x00, 0x00, 0x1C,
/* #1.98, command: write_value, address: SEMC_BR4, value: 0x9E00001A, size: 4 */
0x40, 0x2F, 0x00, 0x20, 0x9E, 0x00, 0x00, 0x1A,
/* #1.99, command: write_value, address: SEMC_BR5, value: 0x90000018, size: 4 */
0x40, 0x2F, 0x00, 0x24, 0x90, 0x00, 0x00, 0x18,
/* #1.100, command: write_value, address: SEMC_BR6, value: 0x98000018, size: 4 */
0x40, 0x2F, 0x00, 0x28, 0x98, 0x00, 0x00, 0x18,
/* #1.101, command: write_value, address: SEMC_BR7, value: 0x9C00001A, size: 4 */
0x40, 0x2F, 0x00, 0x2C, 0x9C, 0x00, 0x00, 0x1A,
/* #1.102, command: write_value, address: SEMC_BR8, value: 0x26, size: 4 */
0x40, 0x2F, 0x00, 0x30, 0x00, 0x00, 0x00, 0x26,
Prevas only changed on COL (9->10 bit) in SDRAMCR0, in relation to the demo projected for RT1052 EVK, since timing works for the first 32MB:
/* #1.104, command: write_value, address: SEMC_SDRAMCR0, value: 0xE01, size: 4 */
0x40, 0x2F, 0x00, 0x40, 0x00, 0x00, 0x0E, 0x01,
/* #1.105, command: write_value, address: SEMC_SDRAMCR1, value: 0x652922, size: 4 */
0x40, 0x2F, 0x00, 0x44, 0x00, 0x65, 0x29, 0x22,
/* #1.106, command: write_value, address: SEMC_SDRAMCR2, value: 0x10920, size: 4 */
0x40, 0x2F, 0x00, 0x48, 0x00, 0x01, 0x09, 0x20,
/* #1.107, command: write_value, address: SEMC_SDRAMCR3, value: 0x50210A08, size: 4 */
0x40, 0x2F, 0x00, 0x4C, 0x50, 0x21, 0x0A, 0x08,
Any suggestions on how to get the upper 32MB to be implemented correctly.
/Jakob
Your configuration seems to be ok, can you please try SEMC_SDRAMCR0 = 0xF01 or 0xD01 to see what is happening then?
For MT48LC16M16A2 (4M x 16 x 4banks) in EVK, we set SEMC_BR0 = 0x8000001B, SEMC_SDRAMCR0 = 0xF01 (COL=9)
For your IS42S16320F (8M x 16 x 4banks), it should be SEMC_BR0 = 0x8000001D, SEMC_SDRAMCR0 = 0xE01 (COL=10)