To Whom It May Concern
Hi, I have a problem very similar to what was expressed in another task: In the linked task, the issue has not been resolved yet.
I use MK61FX512 controller.
In my case 2 devices connected to 16-bit bus with different CS. AA = 0. Burst modes are disabled.
When I read 16 bit data - all is great. But when I try to read 32 bits through 16-bit bus - only first CSn is asserted, at the same time second TS is asserted correct (fig.1).
The same behavior is observed on both devices connected to flexbus.
My question is: what may be wrong?
Figure 1. Diagram observed on slave FPGA.
