why bare-metal head file is so different from PE head file even with same version like MK21F12.h

[haizhouli]

Hi there,

I have two projects based on TWR-K21F120M. One is based on bare metal; the other one is based on PE.

When I tried to transplant some codes from each other, I saw compile errors. Then I compared the two MK21F12.h. They are so different. PE head file is 14415 lines. while the bare metal is 8287 lines. But when I compares the topline comments, they had the same version at the same date.

I just wonder what is the purpose to let KDS generate two different head files for one mcu? I can copy one over the other, but I am just so curious.

Thanks!

Haizhou

PE

==============================

/*

** ###################################################################

**     Compilers:           ARM Compiler

**                          Freescale C/C++ for Embedded ARM

**                          GNU C Compiler

**                          IAR ANSI C/C++ Compiler for ARM

**

**     Reference manual:    K21P144M100SF5RM, Rev.2, Apr 2013

**     Version:             rev. 1.7, 2014-02-18

**

**     Abstract:

**         This header file implements peripheral memory map for MK21F12

**         processor.

**

**     Copyright: 1997 - 2014 Freescale, Inc. All Rights Reserved.

**

**     http:                 www.freescale.com

**     mail:                 support@freescale.com

**

**     Revisions:

**     - rev. 1.0 (2012-11-12)

**         Initial version.

**     - rev. 1.1 (2012-12-04)

**         Update according to reference manual rev.1

**     - rev. 1.2 (2013-01-21)

**         Registers related to security features removed.

**     - rev. 1.3 (2013-04-05)

**         Changed start of doxygen comment.

**     - rev. 1.4 (2013-04-23)

**         System timer registers added.

**     - rev. 1.5 (2013-05-16)

**         Update according to reference manual rev.2

**     - rev. 1.6 (2013-10-29)

**         Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.

**     - rev. 1.7 (2014-02-18)

**         UART0 module - LON registers removed.

**

** ###################################################################

*/

/*!

* @file MK21F12.h

* @version 1.7

* @date 2014-02-18

* @brief Peripheral memory map for MK21F12

*

* This header file implements peripheral memory map for MK21F12 processor.

*/

bare metal

===================

/*

** ###################################################################

**     Compilers:           ARM Compiler

**                          Freescale C/C++ for Embedded ARM

**                          GNU C Compiler

**                          GNU C Compiler - CodeSourcery Sourcery G++

**                          IAR ANSI C/C++ Compiler for ARM

**

**     Reference manual:    K21P144M100SF5RM, Rev.2, Apr 2013

**     Version:             rev. 1.7, 2014-02-18

**

**     Abstract:

**         CMSIS Peripheral Access Layer for MK21F12

**

**     Copyright: 1997 - 2014 Freescale, Inc. All Rights Reserved.

**

**     http:                 www.freescale.com

**     mail:                 support@freescale.com

**

**     Revisions:

**     - rev. 1.0 (2012-11-12)

**         Initial version.

**     - rev. 1.1 (2012-12-04)

**         Update according to reference manual rev.1

**     - rev. 1.2 (2013-01-21)

**         Registers related to security features removed.

**     - rev. 1.3 (2013-03-11)

**         System initialization updated to add 120MHz clock option.

**     - rev. 1.4 (2013-04-05)

**         Changed start of doxygen comment.

**     - rev. 1.5 (2013-05-16)

**         Update according to reference manual rev.2

**     - rev. 1.6 (2013-10-29)

**         Definition of BITBAND macros updated to support peripherals with 32-bit acces disabled.

**         The declaration of clock configurations has been moved to separate header file system_xxxx.h

**         Startup file for gcc has been updated according to CMSIS 3.2.

**         Access restriction of some registers fixed.

**     - rev. 1.7 (2014-02-18)

**         UART0 module - LON registers removed.

**

** ###################################################################

*/

/*!

* @file MK21F12.h

* @version 1.7

* @date 2014-02-18

* @brief CMSIS Peripheral Access Layer for MK21F12

*

* CMSIS Peripheral Access Layer for MK21F12

*/

[adriancano · Accepted solution]

Hi,

This is because, as you can see in the header file added by No-PEx project, the file is a CMSIS Peripheral Access Layer, this means that this header has the CMSIS standard therefore less macros, less definition than the other file but it is including the same register and modules. The main goal behind this is that CMSIS is an industry wide software library for the ARM Cortex microcontroller. Using the CMSIS libraries and interfaces will make it easier to port applications within the ARM Cortex family.

The header file included by PEx component is a simple header file that implements memory map for the device with different definitions and types.

Using any of this header will not affect your application.

I hope this information can help you.

Regards,

Adrian

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