S32K144: IAR SW issue

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32K144: IAR SW issue

1,216 Views
Alex28
Contributor I

Under IAR, debugging can still be done when the interrupt vector table is not at position 0. What are the specific principles and processes?

0 Kudos
Reply
1 Reply

551 Views
yisey
Contributor II

In IAR Embedded Workbench, debugging works with a relocated interrupt vector table because the CPU supports vector table relocation (e.g., via a VTOR register on ARM Cortex-M). The debugger reads the current vector table base address from the CPU, maps the interrupt vectors to the corresponding ISR symbols, and uses the linker-generated symbol table to resolve addresses. Similar to how a USA paint estimator helps calculate coverage and cost accurately, the debugger aligns with the relocated vector table at startup, allowing breakpoints and step-through debugging to function normally even when the table is not at address 0.

0 Kudos
Reply
%3CLINGO-SUB%20id%3D%22lingo-sub-2183450%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ES32K144%3A%20IAR%20SW%20issue%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2183450%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3E%3CSPAN%3EUnder%20IAR%2C%20debugging%20can%20still%20be%20done%20when%20the%20interrupt%20vector%20table%20is%20not%20at%20position%200.%20What%20are%20the%20specific%20principles%20and%20processes%3F%3C%2FSPAN%3E%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-LABS%20id%3D%22lingo-labs-2183450%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CLINGO-LABEL%3EeIQ%20Machine%20Learning%20Software%20for%20i.MX%20RT%3C%2FLINGO-LABEL%3E%3C%2FLINGO-LABS%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2269488%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20S32K144%3A%20IAR%20SW%20issue%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2269488%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EIn%20IAR%20Embedded%20Workbench%2C%20debugging%20works%20with%20a%20relocated%20interrupt%20vector%20table%20because%20the%20CPU%20supports%20vector%20table%20relocation%20(e.g.%2C%20via%20a%20VTOR%20register%20on%20ARM%20Cortex-M).%20The%20debugger%20reads%20the%20current%20vector%20table%20base%20address%20from%20the%20CPU%2C%20maps%20the%20interrupt%20vectors%20to%20the%20corresponding%20ISR%20symbols%2C%20and%20uses%20the%20linker-generated%20symbol%20table%20to%20resolve%20addresses.%20Similar%20to%20how%20a%20%3CA%20href%3D%22https%3A%2F%2Fmiddler.com%2F%22%20target%3D%22_self%22%20rel%3D%22nofollow%20noopener%20noreferrer%22%3EUSA%20paint%20estimator%3C%2FA%3E%20helps%20calculate%20coverage%20and%20cost%20accurately%2C%20the%20debugger%20aligns%20with%20the%20relocated%20vector%20table%20at%20startup%2C%20allowing%20breakpoints%20and%20step-through%20debugging%20to%20function%20normally%20even%20when%20the%20table%20is%20not%20at%20address%200.%3C%2FP%3E%3C%2FLINGO-BODY%3E