S32K144: IAR SW issue

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S32K144: IAR SW issue

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Alex28
Contributor I

Under IAR, debugging can still be done when the interrupt vector table is not at position 0. What are the specific principles and processes?

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yisey
Contributor II

In IAR Embedded Workbench, debugging works with a relocated interrupt vector table because the CPU supports vector table relocation (e.g., via a VTOR register on ARM Cortex-M). The debugger reads the current vector table base address from the CPU, maps the interrupt vectors to the corresponding ISR symbols, and uses the linker-generated symbol table to resolve addresses. Similar to how a USA paint estimator helps calculate coverage and cost accurately, the debugger aligns with the relocated vector table at startup, allowing breakpoints and step-through debugging to function normally even when the table is not at address 0.

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