Hello!
I am working on project that stores some configuration data in EEPROM memory. This data is only wirtten once and read during every device startup.
Currently, we are using 2x lover frequency divider, than recommended in datasheet:
FDIV = 0x0B -> should be 0x18
BUSCLK = 50Mhz
Is that higher frequency also stressing flash module, during normal program execution (reading code instructions from flash) ?
Here is block diagram, but I am not sure, if that freqency refers to all device memory.
This configuration works perfectly fine for us during lab tests, but we need to make sure, what about long life risks.
Do you know more about those risks?
I would be grateful for any help,
Best regards
