In the kernel source I did this:
diff --git a/arch/arm64/boot/dts/congatec/imx8mp-cgtqx8p.dts b/arch/arm64/boot/dts/congatec/imx8mp-cgtqx8p.dts
index e55e20fa65a1..ffa0b55056e0 100755
--- a/arch/arm64/boot/dts/congatec/imx8mp-cgtqx8p.dts
+++ b/arch/arm64/boot/dts/congatec/imx8mp-cgtqx8p.dts
@@ -28,7 +28,7 @@ memory@40000000 {
};
chosen {
- stdout-path = &uart2;
+ stdout-path = &uart1;
};
gpio-keys {
In U-Boot:
diff --git a/arch/arm/dts/imx8mp-cgtqx8p.dts b/arch/arm/dts/imx8mp-cgtqx8p.dts
index c0d2f0749e..128c26b411 100644
--- a/arch/arm/dts/imx8mp-cgtqx8p.dts
+++ b/arch/arm/dts/imx8mp-cgtqx8p.dts
@@ -18,8 +18,8 @@
compatible = "cgt,qx8p", "fsl,imx8mp-evk", "fsl,imx8mp";
chosen {
- bootargs = "console=ttymxc1,115200 earlycon=ec_imx6q,0x30890000,115200";
- stdout-path = &uart2;
+ bootargs = "console=ttymxc0,115200 earlycon=ec_imx6q,0x30860000,115200";
+ stdout-path = &uart1;
};
memory@40000000 {
@@ -395,6 +395,14 @@
};
};
+&uart1 {
+ /* RF board USB console */
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+ assigned-clocks = <&clk IMX8MP_CLK_UART1>;
+ assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>;
+ status = "okay";
+};
/* uart1: Q-Seven UART0 with CTS/RTS (unused) */
/* uart4: on module uart DCE1 (X4: pin 1 and pin 6) (unused) */
@@ -654,6 +662,13 @@
>;
};
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x49
+ MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x49
+ >;
+ };
+
pinctrl_uart2: uart2grp {
fsl,pins = <
MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49
diff --git a/include/configs/cgtqx8p.h b/include/configs/cgtqx8p.h
index 763edecf84..3e311e2d53 100644
--- a/include/configs/cgtqx8p.h
+++ b/include/configs/cgtqx8p.h
@@ -20,7 +20,7 @@
* OR: QSEVEN pins 185/188 (DEFAULT: GPIO0 and GPIO3)
* - 3: on module debug port (DCE1), iMX8mp: uart 4
*/
-#define CGT_SERIAL_CONSOLE_NR 1
+#define CGT_SERIAL_CONSOLE_NR 0
/*
* MMCAUTODETECT_ENV=yes enables automatic adaption of MMCDEV and MMCROOT on
This was done for the Q7 iMX8 SOM. I flashed this to the QSPI flash and the SPL bootloader reported out the new UART1 console port (nothing out of the congatec console port). However, as I forcasted in my last update, you should make sure you have the eval board because if you flash the bootloader into the SPI flash during runtime and something is not right, you will not be able to fix it. I unfortunately have not received my eval board in the mail yet. I say this because these modifications I've made for some reason do not make it past the SPL bootloader. It's on it's way there though because I did get UART1 console sort of working now.