The MC56F83xxx is the latest DSC family, it integrates new features such as CAN-FD, USB, enhanced DMA, can be used in motor control, switch mode power supply applications. T he MC56F83xxx runs code in on-chip flash, so the Bootloader’ s main task is to update the internal flash memory with an embedded application firmware image during manufacturing, or at any time during the life of the device. The Bootloader does the provisioning by acting as a slave device, and listening to various peripheral ports where a master can start communication. The Doc describes the procedures to use the bootloader to download application code to flash, for example the hardware connection, generating S-Record file, selecting the S-Record file, the blhost commands, especially, the traps customer may face.
The PROGDSC tools utilization The PROGDSC tools is PE tools from PEMicro company, which can be used to download code to on-chip flash via JTAG port. The supported device includes Multilink Universal device and OSJTAG which the MC56F83000-EVK board has integrated. The supported DSC families include: DSP56800E core family: MC56F8000 family: MC56F8006, MC56F8013, MC56F8014, MC56F8037… MC56F83xx family: MC56F8323, MC56F8322, MC56F8345, MC56F8346… MC56F82xx family:MC56F824x, MC56F825x… DSP56800EX core family MC56F84xxx family:MC56F84789, MC56F84553.. MC56F82xxx family: MC56F82748, MC56F82723 MC56F83xxx family: MC56F83789… For detailed inf, pls refer to the attached doc.
For switch mode power supply application, the output voltage resolution is dependent on PWM resolution, the PWM resolution is dependent on the PWM module driving clock(IP Bus clock) frequency and PWM signal output frequency. But the eflexPWM module has a new feature Fraction Delay logic with Micro-Edge Placement, which is equivalent to increase the PWM module driving clock frequency, accordingly increase the PWM resolution. For the MC56F84xxx, there are two eFlexPWM modules: eFlexPWMA and eFlexPWMB, the eFlexPWMA supports fractional Delay logic with micro-edge placement. For MC56F82xxx, there is only one eFlexPWMA module. The eFlexPWMA module has an internal PLL which can multiply the PWM driving clock frequency by 32. For example, for the MC56F84789, the PWM driving clock frequency is 100MHz, the internal PLL of eFlexPWM module can output a clock frequency 32*100MHz=3.2GHz, so the PLL clock cycle is 312pS, in other words, the fractional cycle time of eFlexPWM is 312pS. For the eFlexPWM module, the eFlexPWMA_SM0 counter counts tick from the value of PWMA_SM0_INIT to the value of PWMA_SM0VAL1 register, the main duty cycle of PWMA_A0 signal is controlled by PWMA_SM0VAL2(rising edge) and PWMA_SM0VAL3(falling edge), the main duty cycle of PWMA_B0 signal is controlled by PWMA_SM0VAL4(rising edge) and PWMA_SM0VAL5(falling edge). The new feature Fraction Delay logic with Micro-Edge Placement of eFlexPWM can place the rising or falling edge with fractional cycle time, which increase the PWM resolution by 5 bits. The demo code demonstrates the feature of Fraction Delay logic with Micro-Edge Placement the eFlexPWM. The SM0 module outputs two channels PWMA_A0 and PWMA_B0. This is the configuration:for PWMA_SM0VAL2= PWMA_SM0VAL4=0xfffd, PWMA_SM0VAL3= PWMA_SM0VAL5=0x03, and PWMA_SM0CTRL2=0x2000; PWMA_SM0FRCTRL=0x8104; PWMA_SM0FRACVAL1= PWMA_SM0FRACVAL2= PWMA_SM0FRACVAL4= PWMA_SM0FRACVAL5=0x00; PWMA_SM0FRACVAL3=0xf000; From the above configuration, the PWMA_A0 and PWMA_B0 are in independent mode and the main duty cycle is the same. But PWMA_SM0FRACVAL3 is assigned with 0xF000, so the falling edge of PWMA_A0 will have a fractional placement as the following figure. The code is developed under CodeWarrior for microcontroller ver 10.6 and processor Expert, TWR-8200 board. In the above figure, the there are two channels which are superimposed together so that user can compare the timing. The channel1(yellow trace) is the PWMA_A0 signal with a fractional edge placement which is connected to pin9 of J510 on TWR-8200 board. The Channel2(pink trace) is PWMA_B0, which does not have fractional edge placement and connected to pin11 of J510. BR XiangJun Rong Original Attachment has been moved to: HRpwm82748.rar
For switch mode power supply application, the output voltage resolution is dependent on PWM resolution, the PWM resolution is dependent on the PWM module driving clock(IP Bus clock) frequency and PWM signal output frequency. But the eflexPWM module has Fraction Delay logic feature, which is equivalent to increase the PWM module driving clock frequency. For the MC56F847xx, there are two eFlexPWM modules: eFlexPWMA and eFlexPWMB, the eFlexPWMA supports fractional Delay logic with micro-edge placement. The eFlexPWMB module does not support the fractional Delay logic with micro-edge placement, but the eFlexPWMB module can use dithering to simulate the fine edge control, the mode is called ”Fraction Delay Logic without Micro-Edge Placement Block”. Although the Reference Manual of MC56F847xx does not list the fractional registers, but they exist exactly. For example, PWMB_SMxFRACVAL1, PWMB_SMxFRACVAL2, PWMB_SMxFRACVAL3, PWMB_SMxFRACVAL4, PWMB_SMxFRACVAL5 and PWMB_SMxFRACTRL exist. The dithering means that the PWM duty cycle can increase or decrease one out of N PWM cycles, the N is dependent on the fraction value defined in the PWMB_SMxFRACVALy register, for example if the PWMB_SM0FRACVAL4 is 0x4000, the fraction equals to 8/32=1/4, it means that the duty cycle of one PWM cycle out of four PWM cycles will increase by one. The dithering mode does not need to enable internal PLL module of eFlexPWM. Configuration: Setting the corresponding bits in PWMB_SMxFRACTRL register, then write the PWMB_SMxFRACVAL1, PWMB_SMxFRACVAL2, PWMB_SMxFRACVAL3, PWMB_SMxFRACVAL4, PWMB_SMxFRACVAL5 registers, it is okay. PWMB_SM0FRCTRL=0x04; PWMB_SM0FRACVAL3=0x2000; The PWMB module configuration: PMB_SM0VAL2= PWMB_SM0VAL4, PWMB_SM0VAL3= PWMB_SM0VAL5, and PWMB_SM0CTRL2=0x2000; PWMB_SM0FRCTRL=0x04; PWMB_SM0FRACVAL3=0x2000; With the above figuration, the PWMB_SM0 is set up in independent mode, and the PWMB_A0 and PWMB_B0 should have the same waveform if there is not fractional feature. After the fractional Delay logic with dithering sub mode is enabled, the duty cycle of one PWM cycle out of 8 PWM cycle is different. In the figure, two channels PWMB_A0 and PWMB_B0 are displayed, because the two signals almost have the save waveform, so they are superimposed most of time, but there are two cycle which are different. The Yellow channel on the oscilloscope is pin 23 of J503( GPIOG2 or PWMB-B0) signal, the pink channel is pin24 of J503(GPIOG3 or PWMB_A0 )signal. You can see one one duty cycle among 8 PWM cycle is different. BR XiangJun Rong
The USB TAP for DSC has been used with the DSC for many years. Provision has been made to utilize a newer programming hardware module, the CodeWarrior TAP. Now, with a simple upgrade to software (the ccs directory of CodeWarrior), the DSC may also be used with the CodeWarrior TAP's USB interface. CodeWarrior 8.3 for DSC unmodified is not able to use the CodeWarrior TAP (but of course works with the USB TAP for DSC). To upgrade your CodeWarrior 8.3 for DSC to be able to use the CodeWarrior TAP (as well as the USB TAP for DSC), get this file from www.freescale.com: AN4824SW.zip (Also it would be a good idea to review AN4824, also available at the same site.) The zip file includes the software for the standalone programmer. This includes the new CCS directory, which may replace the CCS directory in CodeWarrior 8.3 for DSC, thus effecting the upgrade. Note, the application associated with AN4824SW.zip already works with the CodeWarrior TAP, as well as the USB TAP for DSC. To upgrade CW 8.3 for DSC, merely delete the CCS directory from CW 8.3 for DSC. Then, replace that directory with the CCS directory available in the AN4824SW.zip. (Once you install AN4824SW.zip, the CCS directory typically ends up at C:\Freescale\Freescale DSC Flasher, if C: is your drive and you use the default install options.) This will give a new CCS directory to CodeWarrior 8.3 for DSC that functions both with the USB TAP for DSC, and the CodeWarrior TAP. Then, both CodeWarrior for DSC and the standalone flash programmer will both work with both the USB TAP for DSC, and the CodeWarrior TAP.
Standard DSC startup code most often includes a do loop. That do loop execution assigns a known value to the LA register. If you are using startup code that does NOT include a do loop, you need to explicitly initialize the LA register to an address that is not inside of an interrupt service routine. Why? Standard save all and restore all code included by the IDE for interrupt handlers can itself be interrupted. There is a window of opportunity to be interrupted after the restore all routine pushes the HWS (Hardware stack register) twice (thus setting both Loop flag in the SR and NL in the OMR registers). If you get interrupted just after doing the HWS pushes, you can enter a fast ISR without clearing the LF, and then if your PC matches the uninitialized LA register (which aquires any possible value after power up) while in the middle of the interrupting ISR, then end of loop is recongnized and program flow becomes erratic after that. Just initialize LA if you change the default stationery, please. Depending on the version of IDE you are using, you may need to worry about the shadow register for M01 as well. Version 8.3 for DSC does not initialize this register, which can lead to issues. If you are using CW 10.6, the currently supported version, this register is initialized by default. Please compare your start-up code to that produced by CW 10.6 for the part you are using if it fits this mask: MC56F8xx, ..8xxx, ..8xxxx.
With a goal of energy conservation, a project is herein documented and attached as a zip file showing how to operate the key peripherals for a simple power supply (which can be embelished as desired). All of the peirpherals involved in a power supply are included in the project and are configured to be clocked during STOP mode. The main program consists of a simple do forever loop which inlcude two instructions: Goto STOP mode NOP The NOP is there just to put a breakpoint to show that the CPU wakes up on the timer interrupt. At that point, the ADC samples are available, the PWM and comparator have been running the power supply. The key is using Processor Expert to configure the clocks to keep running in STOP mode. This lets the core stop while the smart peripherals keep the power supply running. This is shown just below: And of course, turn on the clocks for these in the regular run mode as well as shown just above. The zipped project is attached for CodeWarrior 10.6 for MCU. It uses the MC56F82748 device, the latest DSC from Freescale.