Signal Timing for SC18IS600IPW/S8

[JonDen]

Hello All,

Our team is wanting to confirm the command method for read/write commands for the internal registers. When sending the Write and Read commands, the MISO appears to be shifted one byte to the right when compared to the MOSI. Could this be something to do with MSB first or LSB first, or possibly something else causing this?

 

[TomasVaverka]

Hi Jonathan,

Please make sure you are using SPI Mode 3. This means that the SCLK signal should be idle high and data is clocked in and out on the rising clock edge. 

Best regards,

Tomas

[JonDen]

Hello Tomas,

Thank you very much for your response.  We still were not able to get it to work even after checking that we were using SPI Mode 3. We also tried putting a minimum of 8 uS (Tspiclkw) between each byte as suggested by MikeThompson in the following post, but the echoed data did not change :

https://community.nxp.com/t5/Other-NXP-Products/For-the-SC18IS600-what-SPI-command-is-for-a-Random-R...

Do you have any other suggestions to try looking into that might be causing the echoed data that is 1 byte shifted to the right?

Best Regards,

Jonathan

[idanu357]

Hello JonDen

I'm so glad to see that I'm not the only one facing this issue ! when i read to verify the value of the internal registers the last bit of data is always "0".

For example, I'm writing 0xFF to the IOConfig register but when i read the value its 0xFE or writing to the same register 0X01 reading 0x00.

To verify that the problem is in the read function and not the write function i set GPIO0 to low-> high-> low and i can see it changes.

Using:

FTDI: FT4232HL

SPI mode:3

Clock frequency:100Khz

Did you buy any change managed to solve this ?