Hi,
Unfortunately, the security feature is related to the Flash technology, for the DSC family with DSP56800EX core for example MC56F84xxx and MC56F82xxx, the two families use the same flash technology as that of Kinetis. If you want to DISABLE the security feature, just do not write any value to the WORD address from P:0x200 to 0x207, in other words, keep the address section as the values shipped from factory.
The following is the memory allocation for MC56F82748. Pls do not touch the program flash address:
.p_reserved_FCF (RWX) : ORIGIN = 0x00000200, LENGTH = 0x00000008
it is okay, the DSC will be in unsecure mode.
This is the security mechanism. After Reset, the Low byte value saved in P:0x206 will be copied to the byte register FTFA_FSEC, if the SEC bits is 10 in binary, the DSC will be in unsecure mode, the user can write/read flash via JTAG.
MEMORY {
# I/O registers area for on-chip peripherals
.x_Peripherals (RW) : ORIGIN = 0xC000, LENGTH = 0
# List of all sections specified in the "Build options" tab
.p_Interrupts (RWX) : ORIGIN = 0x00000000, LENGTH = 0x000000DE
.p_Code (RWX) : ORIGIN = 0x00000208, LENGTH = 0x00007DF8
.x_Data (RW) : ORIGIN = 0x00000000, LENGTH = 0x00001000
.p_reserved_FCF (RWX) : ORIGIN = 0x00000200, LENGTH = 0x00000008
.x_internal_ROM (RW) : ORIGIN = 0x000040DE, LENGTH = 0x00000122
# p_flash_ROM_data mirrors x_Data, mapping to origin and length
# the "X" flag in "RX" tells the debugger flash p-memory.
# the p-memory flash is directed to the address determined by AT
# in the data_in_p_flash_ROM section definition
.p_flash_ROM_data (RX) : ORIGIN = 0x00000000, LENGTH = 0x00001000
}
BR
XiangJun Rong