This presentation will present a simple EM physics and geometry based approach to designing power distribution networks on PCBs. From input power connection to the IC die, the simple rules discussed can be used to reduce power supply noise and improve EMC. New research presented on the impact of discrete components on radiated and conducted emissions, with an emphasis on cost analysis. Results of recent research on various power supply PCB topology will be discussed.
The GD3100 is a programmable high-voltage gate driver with advanced functional safety (FuSa), control, and protection features, developed for automotive and eMobility applications. This presentation will give a brief review of HV power devices such as Si IGBTs and WBG MOSFETs. Then the talk will focus on key features of the GD3100 that are important for implementation of high traction inverters, DC/DC converters, or on-board chargers (OBCs) using Si IGBTs or SiC MOSFETs.
In electronic systems, it is typical to have a central processing unit that interfaces with other peripheral devices, other sub-systems or the user. Often, the signals from these interconnects may be incompatible on both ends. Therefore, various semiconductor devices such as analog switches, voltage level translators and GPIO expanders are often used to bridge between the interconnects on the board. In this session, we will explore the application of these interface devices from NXP and discuss their applications in various customer systems.
Low-power wearable/IoT applications are becoming more and more popular. In this session, we will go over some of the key aspects when considering the system-level power management solution for these application, pros and cons when choosing different topologies (for example, DC/DC regulator vs. LDO), overall system level power optimization, and key components selection consideration, etc.
Introduction of new part, tailored for long daisy chains in HV systems and ESS. BOM cost optimizations with new revC, including capacitive coupling. Introduction of new BMC and CMC reference designs, showing new levels of cost, size and performance optimization.