Winning with i.MX 8/8X

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Winning with i.MX 8/8X

Winning with i.MX 8/8X

Join this session to get a glimpse of where you will see i.MX 8/8X in the near future and why graphics, ML, AI, video, image processing, vision, connectivity, audio and voice functions make the i.MX 8 series ideal for Automotive and Industrial applications. Learn about the i.MX 8/8X families that are comprised of common subsystems establishing an unmatched range of performance scaling with pin-compatible options and the highest level of software reuse. In addition, learn more about the upcoming i.MX 8DualMax product line to help customers meet additional cost performance scaling across the i.MX 8 family.

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Hello reneeamossberg-r2388c

I have some questions about "Resource Domain Protection" in this document.

What is a minimum unit of CPU's to separate each domain partition?

In page 29, it have a partition between 4xCA53 and 2xCA72 CPUs.

I understand that it is reasonable to separate it because these CPUs are different core complex.

In page 30, it have a partition between 2xCA53 and 2xCA53+2xCA72.

Does it can separate 4xCA53 core to different partition like page 30 and 32?

You say "Each IP Block has Hardware-based resource protection ‘stitched’around it" in page 29.

Can it keep a "Hardware-based resource protection" following resource combination?

CPU1:CA53, CPU2:CA53 -> Linux

CPU3:CA53, CPU4:CA53, CPU0:CA72, ,CPU1:CA72 -> Android

I hope to know that different OS like Android and Linux can work with these CPU partitioning.

I look forward to hearing from you.

Best regards,

Ishii.

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最終更新日:
‎06-10-2019 04:59 PM
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