When I read the system integration module reference manual and one sentence I can't understand. It is "The state of the clock mode (MODCLK) pin during reset determines which clock source the MCU uses. When MODCLK is held high during reset, the clock signal is generated from a reference frequency. When MODCLK is held low during reset, the clock synthesizer is disabled, and an external system clock signal must be applied."
So my question is how do I make MODCLK high or low during reset, is that connect a resistor between VDD and MODCLK pin?
MC68332 is a little bit outdated. If you can, you'd rather learn MCF523x family, which is the ColdFire family replacement. It include a new eTPU unit with a lots improvements (TPU probably made the 68332 success).
I have heard about the coldfire, i am a beginner and we do not have a emluator and others useful books, I only down some user's manual, so study MC68332 maybe easier than coldfire. For anther reason that is my tutor's idea.