SP_INIT

[MrBean]

The MCF522xx cores should load the SSP with the contents of location 0x0000_0000  on reset, so called SP_INIT in the vectortable (next is PC_INIT).

Why do i see random contents in A7 as well as OTHER_A7 in the register view of the dedugger ?

( directly after a reset, so PC=PC_INIT,  as well as in the next few instructions )   

( contents of other registers do diplay correctly )

Is that a feature of the debug mode or is the SSP accutally *not* loaded ?

How come ?

(PS: current cpu = MCF52235 )

Message Edited by MrBean on 2008-12-04 07:34 PM

[ChrisJohns]

It is a feature of the debug mode. Just after reset the core is waiting to start. If you load the PC register the core will start executing at that address. This is nice when your flash is blank. If you do not set the PC and  issue a step instruction or continue command the vector locations will be read and execution will start at those locations.

This means the vector table read does not occur until the first instruction executes and you have not set the PC. If you set the PC you should also set the SP.