MCF5485 Bootrom Vector and code segment placement

[shekel]

I am new to the ColdFire environment and trying to understand the placement of the initial ROM interrupt vector and code space.  I have seen some linker files that seemed to have placed the initial interrupt vector at the address 0xFFE0_0000 which is 2MB prior to the end of addressable space.  I saw another linker file that seemed to place the ROM interrupt vectore table at 0xFF80_0000, 8MB below the end of addressable space.  I have tried searching through the various reference manuals and cannot seem to fine where the CPU will fetch the initial Program Counter from index 0 of the ROM vector table. Can someone please indicate how the CPU determines the address from which it will fetch the initial PC on start-up?

Thank you.

[KenJohnson · Accepted solution]

The longword at address 0 is loaded into the stack pointer and the longword at address 4 is loaded into the PC (see Reset exception description in table 3-23 of the reference manual.)  This access will always occur on FBCS0 by virtue of the Global Chip-Select operation.  See section 17.1.5.2 of the reference manual for more information about Global Chip-Select operation.