Jacques,
I don't think this will be good news for you. But the DDR industry has not be extremely easy on the embedded industry. On the old SDRAM DIMMs (SDR), you had two chipselects and could address the "high" or "low" 32 bits of the DIMM and therefore on an embedded processor you could connect/use two of your SDRAM controller's chipselects.
On DDR dimms, and I haven't double checked the 200pin version, I think you only have one chipselect. When you say 200 pin are you referring to the "laptop" style SODIMMS?
Anyway...the secret is in how the DIMM is split across one or multiple chipselects. Either way, the 16bit wide data bus on the 5329 is probably not going to hook to a normal over the counter DIMM without giving up some of the data bus width.
One piece of good news.
There is a 100 pin DDR DIMM standard that utilizes a 32 bit wide form factor. This will work with the 547x and 548x family.
There are also new standards for DDR2 DIMMs in both 16 bit wide and 32 bit wide form factors. This won't help you on your current DDR question, but could be of use in the future.

-JWW