hi all,
i read something about,
first. the MCF5307 datasheet says:
See Section 17.5.5, “Data/Configuration Pins (D[7:0]).” Motorola recommends that the
data pins be driven rather than using a weak pull-up or pull-down resistor. Table 17-1 lists
the encoding of these pins sampled at reset.
Is there any diagram on how drive the signals up/down properly ?
then, i have seen that all the signals that control the SDRAM are driven high at reset time from the CPU, but strangely, the SDRAM don't switch the data lines to high impedance.
I am trying to contact micron for support someway.
thanks
Message Edited by spectrum on 2009-11-08 01:26 AM