This is pin J10 on the 14 pin MAPBGA. It has the functions "GPT2/PWM5/PTA2". The pin name in Figure 15.1 is "ICOC[2] / PTA[2] / PWM5", with "ICOC being "IC/OC" elsewhere. Its function is controlled by PTAPAR. This defaults to ZERO on Reset, which selects GPT2. This is detailed in "Table 2-1. Pin Functions by Primary and Alternate Purpose".
The power-up state of the GPTs are detailed in the sections you've found, and it says the reset state of that bit should be "disabled" when the GPT has the pin. But the reset state of PTPAR is "00" and than means GPIO.
There's also "Note 2" and "Note 8" on the entry in Table 2.1. "Note 2" says GPIOs have pullups. "Note 8" says the GPT module controls the pullup when it is in charge. But it resets as a GPIO.
Therefore the reset state of that pin (and all pins that are GPIOs) is high. That's just what the chip does. Your hardware design either has to treat the reset state (which is "high") as the "Inactive State", or you have to add a pulldown on that pin. So add an inverter or a pulldown. There's no other way, unless you want to build a resistor/capacitor/diode circuit to force the PWM off for 20ms or more after reset.
> How can we disable the internal pull up?
You can't.
> however it will been default to GPIO (PTA2) after reset if not configured as primary function(GPT2).
> So for your case, please make sure if you had set the GPT function correctly.( By Pin Assignment Registers).
It will unconditionally default to GPIO. It doesn't matter if it was configured for PWM before the reset, it is going to be GPIO during and after until the code can get around to changing it. Which by the trace takes about 10ms. The assignment can't be changed by anything DURING Reset. So the backlight flashes on for the 100ms Reset time plus the 10ms code time.
Tom