For a particular project, I use an MCF51QE128 working on a board as a IIC slave. I would like to know how to implement "i2c clock stretching". The master I use is built on MCF52233 and I do not want to provide delays here just to get good information from my slave MCF51QE128, I would like this chip to slow down the master instead. Is there any solution to this?
May be keeping the IIF flag uncleared in the slave ISR keeps the clock held low, and when the interrupt is cleared the clock will be released.
I am not sure about this but logically this should work fine.
Please let me know if my understanding is wrong.
Thanks & Regards,
Chethu