__interrupt__void timer_handler (void){ MCF_PIT0_PMR |= MCF_PIT_PCSR_PIF;}
/* FUNCTION: PIT_Timer_Init() * * Initialise and enable a Programmable Interval Timer * * PARAM1: PIT - can be 0, 1, 2 or 3 * * PARAM2: Prescaler value - sets the tick frequency to * (system clock/2) divided by 2^PCSR * * PARAM3: Modulo counter - sets the mumber of ticks per interrupt * * PARAM4: Interrupt handler * * RETURNS: none */voidPIT_Timer_Init(uint8 timer, uint8 PCSR, uint16 PMR, void (*handler)(void)){ // At 64MHz: // PCSR = 5 gives a tick per uS // PMR = 10000 gives an interrupt every 10ms if (timer < 4) { uint8 ipl = MCF5282_INTC_ICR_IL(TIMER_NETWORK_LEVEL) | MCF5282_INTC_ICR_IP(timer); MCF5282_PIT_PCSR(timer) = 0; // Set up interrupt handler mcf5282_interrupt_init(timer + 55, ipl, handler); // Set modulo count // (= number of ticks per interrupt) MCF5282_PIT_PMR(timer) = PMR; // Tick frequency = (system clock/2) divided by 2^PCSR MCF5282_PIT_PCSR(timer) = (uint16)(MCF5282_PIT_PCSR_PRE(PCSR)); // Create and enable 'set and forget' timer MCF5282_PIT_PCSR(timer) |= MCF5282_PIT_PCSR_OVW | MCF5282_PIT_PCSR_PIE | MCF5282_PIT_PCSR_PIF | MCF5282_PIT_PCSR_RLD | MCF5282_PIT_PCSR_EN; }}/* FUNCTION: PIT_Timer_Stop() * * Disable timer interrupts for the specified PIT * * PARAM1: PIT - can be 0, 1, 2 or 3 * * RETURNS: none */voidPIT_Timer_Stop(uint8 timer){ if (timer < 4) MCF5282_PIT_PCSR(timer) &= ~( MCF5282_PIT_PCSR_PIE | MCF5282_PIT_PCSR_EN );}
/* FUNCTION: mcf5282_interrupt_init() * * Initialise an interrupt handler for an interrupt source * for INTC0. If the handler is a NULL pointer, then mask * this interrupt. * * PARAM1: Interrupt source (1..62) * * PARAM2: Interrupt level and priority * * PARAM3: Interrupt handler * * RETURNS: none */voidmcf5282_interrupt_init(uint8 source, uint8 ipl, void (*handler)(void)){ // Only for user defined vectors in INTC0 if ((source > 0) && (source < 63)) { // Interrupts should be disabled to avoid vector problems // and to ensure that a spurious interrupt exception can't // be generated. uint8 sysint = asm_set_ipl(7); if (handler) { // Set interrupt priority level MCF5282_INTC0_ICR(source) = (ipl & 0x3F); // Set vector mcf5xxx_set_handler(source+64, (ADDRESS)handler); // Clear mask for this handler if (source < 32) MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_INT(source) | MCF5282_INTC_IMRL_MASKALL); else { MCF5282_INTC0_IMRL &= ~(MCF5282_INTC_IMRL_MASKALL); MCF5282_INTC0_IMRH &= ~(MCF5282_INTC_IMRH_INT(source)); } } else { // Set vector mcf5xxx_set_handler(source+64, (ADDRESS)handler); // Set mask for this handler if (source < 32) { MCF5282_INTC0_IMRL |= MCF5282_INTC_IMRL_INT(source); } else { MCF5282_INTC0_IMRH |= MCF5282_INTC_IMRH_INT(source); } } // As you were... asm_set_ipl(sysint); }}/********************************************************************/
Message Edited by mccp on 2007-03-2311:36 AM