Interrupts TABLE/* File: vectors.s * Purpose: MCF5223 vector table *///#define __GNUC__ #ifdef __GNUC__ /* { */#define sr %sr#define _ethernet_handler ethernet_handler#define _irq_handler irq_handler#define _timer_isr timer_isr#define _uart0_isr uart0_isr#define _BUF0I_handler BUF0I_handler#define _BUF1I_handler BUF1I_handler#define _BUF2I_handler BUF2I_handler#define _BUF3I_handler BUF3I_handler#define _BUF4I_handler BUF4I_handler#define _BUF5I_handler BUF5I_handler#define _BUF6I_handler BUF6I_handler#define _BUF7I_handler BUF7I_handler#define _BUF8I_handler BUF8I_handler#define _BUF9I_handler BUF9I_handler#define _BUF10I_handler BUF10I_handler#define _BUF11I_handler BUF11I_handler#define _BUF12I_handler BUF12I_handler#define _BUF13I_handler BUF13I_handler#define _BUF14I_handler BUF14I_handler#define _BUF15I_handler BUF15I_handler#endif /* } __GNUC__ */ .global VECTOR_TABLE .global _VECTOR_TABLE .global start .global asm_int_off .global _asm_int_off .global asm_int_on .global _asm_int_on .extern ___SP_INIT .extern _asm_startmeup .extern _asm_exception_handler .extern _irq_handler .extern _ethernet_handler .extern _timer_isr .extern _ephy_handler .extern _uart0_isr .extern _uart1_isr .extern _fec_isr .extern_BUF0I_handler .extern _BUF1I_handler .extern_BUF2I_handler .extern _BUF3I_handler .extern_BUF4I_handler .extern_BUF5I_handler .extern_BUF6I_handler .extern_BUF7I_handler .extern_BUF8I_handler .extern_BUF9I_handler .extern_BUF10I_handler .extern_BUF11I_handler .extern_BUF12I_handler .extern_BUF13I_handler .extern_BUF14I_handler .extern_BUF15I_handler .textvector88: .long _BUF0I_handlervector89: .long _BUF1I_handlervector8A: .long _BUF2I_handlervector8B: .long _BUF3I_handlervector8C: .long _BUF4I_handlervector8D: .long _BUF5I_handlervector8E: .long _BUF6I_handlervector8F: .long _BUF7I_handlervector90: .long _BUF8I_handlervector91: .long _BUF9I_handlervector92: .long _BUF10I_handlervector93: .long _BUF11I_handlervector94: .long _BUF12I_handlervector95: .long _BUF13I_handlervector96: .long _BUF14I_handlervector97: .long _BUF15I_handler__interrupt__ void BUF0I_handler(void); . . . .__interrupt__ void BUF15I_handler(void);Initialize CAN bus, with coldfire Init of MICROAPL/* Pin assignments for port AS Pin AS3 : GPIO input Pin AS2 : GPIO input Pin AS1 : FlexCAN receive data, CANRX Pin AS0 : FlexCAN transmit data, CANTX */ MCF_GPIO_DDRAS = 0; MCF_GPIO_PASPAR = MCF_GPIO_PASPAR_PASPAR1(0x2) | MCF_GPIO_PASPAR_PASPAR0(0x2);/#define FLEXCAN_BUFFERS ((unsigned long) &CANMCR + 0x80)/ FlexCAN Message Buffer 0 is receive buffer. Message ID = xxxxxxxxxxx xx11111111xxxxxxxx */ * (vuint32 *) FLEXCAN_BUFFERS = 0x00000000; /* Make buffer inactive */ * (vuint32 *) (FLEXCAN_BUFFERS + 0x4) = 0x0000ff00; /* Initialise extended ID */ * (vuint32 *) FLEXCAN_BUFFERS = 0x04280000; /* Initialise code and status */ IMASK = IMASK_BUF(15) | IMASK_BUF(14) | IMASK_BUF(13) | IMASK_BUF(12) | IMASK_BUF(11) | IMASK_BUF(10) | IMASK_BUF(9) | IMASK_BUF(8) | IMASK_BUF(7) | IMASK_BUF(6) | IMASK_BUF(5) | IMASK_BUF(4) | IMASK_BUF(3) | IMASK_BUF(2) | IMASK_BUF(1) | IMASK_BUF(0); RXGMASK = RXGMASK_MI(0xff00); RX14MASK = RX14MASK_MI(0xf000); RX15MASK = RX15MASK_MI(0xf00); CANCTRL = CANCTRL_PRESDIV(0x3b) | CANCTRL_PSEG1(0x1) | CANCTRL_PSEG2(0x1) | CANCTRL_CLK_SRC | CANCTRL_PROPSEG(0x4); CANMCR | = CANMCR_MAXMB(0xf); CANMCR &= ~(CANMCR_FRZ | CANMCR_HALT); // leave freeze mode and start Controller interrupt initialization.void init_interrupt_controller (void){char i; for (i = 8; i < 24; i++) { MCF_INTC1_ICR(i) = MCF_INTC_ICR_IL(5); } MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK8); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK9); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK10); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK11); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK12); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK13); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK14); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK15); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK16); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK17); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK18); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK19); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK20); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK21); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK22); MCF_INTC1_IMRL &= ~(MCF_INTC_IMRL_INT_MASK23); }void Escribir_CAN(vuint8 order,vuint8 dest, vuint8 auxi, vuint8 datos[],vuint8 ndatos){vuint8 code_act=0xC;vuint8 j,contador;vuint32 *pescrcan_buffer; pescrcan_buffer= &MBUFF13_ADD; printf("bufferadd = %x \n", &pescrcan_buffer);//pescrcan_buffer=(vuint8)(0x0F & (0x02<<20));*pescrcan_buffer=(vuint8)(0xFF & (auxi<<32));*pescrcan_buffer=(vuint8)(0xFF & (dest<<40));*pescrcan_buffer=(vuint8)(0xFF & (0x0A<<48));*pescrcan_buffer=(vuint8)(0x1F & (order<<56)); contador=0; for(j = 0; j < ndatos; j++) { *pescrcan_buffer=(vuint8)(0xFF & (datos[j]<<(64+contador))); contador=contador+8; } contador=0;*pescrcan_buffer=(vuint8)(0x0F & (ndatos<<16));*pescrcan_buffer=(vuint8)(0x0F & (code_act<<24));while((*pescrcan_buffer<<24)!=0x08){};IFLAG|=IFLAG_BUF(13);}Apart from this, pescrcan_buffer = 0x20000C60 not 0x401C0150(CAN buffer 13 to write), see code
#define MBUFF0_ADD (*(vuint32*)(&__IPSBAR[0x1C0080])) // CAN Message Buffer 0 (16 bytes) BROADCAST, reading#define MBUFF1_ADD (*(vuint32*)(&__IPSBAR[0x1C0090])) // CAN Message Buffer 1 (16 bytes)#define MBUFF2_ADD (*(vuint32*)(&__IPSBAR[0x1C00A0])) // CAN Message Buffer 2 (16 bytes)#define MBUFF3_ADD (*(vuint32*)(&__IPSBAR[0x1C00B0])) // CAN Message Buffer 3 (16 bytes)#define MBUFF4_ADD (*(vuint32*)(&__IPSBAR[0x1C00C0])) // CAN Message Buffer 4 (16 bytes)#define MBUFF5_ADD (*(vuint32*)(&__IPSBAR[0x1C00D0])) // CAN Message Buffer 5 (16 bytes)#define MBUFF6_ADD (*(vuint32*)(&__IPSBAR[0x1C00E0])) // CAN Message Buffer 6 (16 bytes)#define MBUFF7_ADD (*(vuint32*)(&__IPSBAR[0x1C00F0])) // CAN Message Buffer 7 (16 bytes)#define MBUFF8_ADD (*(vuint32*)(&__IPSBAR[0x1C0100])) // CAN Message Buffer 8 (16 bytes)#define MBUFF9_ADD (*(vuint32*)(&__IPSBAR[0x1C0110])) // CAN Message Buffer 9 (16 bytes)#define MBUFF10_ADD (*(vuint32*)(&__IPSBAR[0x1C0120])) // CAN Message Buffer 10 (16 bytes)#define MBUFF11_ADD (*(vuint32*)(&__IPSBAR[0x1C0130])) // CAN Message Buffer 11 (16 bytes)#define MBUFF12_ADD (*(vuint32*)(&__IPSBAR[0x1C0140])) // CAN Message Buffer 12 (16 bytes)#define MBUFF13_ADD (*(vuint32*)(&__IPSBAR[0x1C0150])) // CAN Message Buffer 13 Writing (16 bytes)#define MBUFF14_ADD (*(vuint32*)(&__IPSBAR[0x1C0160])) // CAN Message Buffer 14 (16 bytes) MULTICAST#define MBUFF15_ADD (*(vuint32*)(&__IPSBAR[0x1C0170])) // CAN Message Buffer 15 (16 bytes) CCLAN(0X10)